From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x230.google.com (mail-wm0-x230.google.com [IPv6:2a00:1450:400c:c09::230]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CDF9621E1B74B for ; Thu, 21 Sep 2017 06:01:02 -0700 (PDT) Received: by mail-wm0-x230.google.com with SMTP id r74so1614257wme.4 for ; Thu, 21 Sep 2017 06:04:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=FRD+HOug98z7iby+tfcoW+VmRNx/q8sn0OEE/dBhukw=; b=PGVkvrCWHV1NUQ7vMhXyBa+k9yYMmGYt0w9rd0kS6Ky86V5V+de317eipOLSYwN1Wx jYwLlaCxqqzIZtJhEhZOCnwbFpA9OJsV3byZbUo+mB2Nc+YHtMhOurrPO1Z1l+S9niUV Do1Ox0Y7UjhRFakCB2+Vk1yfVCdga/RI36R8M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=FRD+HOug98z7iby+tfcoW+VmRNx/q8sn0OEE/dBhukw=; b=aaOmyprYeOURxx+MnxN0RWrTzukwVm0QtSzLUDlHVCqzVYHVqs3/3c3lLW/yojwG4c 9KGgdsjUrX/dSVbzzJ5yhuaQqQu9J8WuBsDoouvGIfAyxU+ykiMaIKGL4xiBWKqI7UEL iUlo9NKNmwOKXnNEJZAomy8a0uQpXQ//jNu4M5N7h0gXfzsVXhzwlN4FDqTnLFq0PuiT HgHWfQYOYYJwY6Jwf7dbNI75/6HQGjWKmpGzr63vtPdasSpD1RTo96+gkQMuKnIjeNBx jNhf+2/d3y2bn6z03PvhY3ZGCJfs86qcb8v4kVM6CUR8QKVlaN5OIpoXfsBQSVQZt1k6 /ocg== X-Gm-Message-State: AHPjjUhRruKsy8tzWNjXp6+oGGOpUJQMM3GYoiWN83pJk6e+7rRYFGNT 1Q4MH+FLH5I0HTf2+YFG41oEsQ== X-Google-Smtp-Source: AOwi7QAKPBQgEXBD0SWlk2J518F+DTGIfDWt2UVA8dfSlu73UoEhjUJjdPS39wVsJ81LXfzZyGtK7Q== X-Received: by 10.28.103.195 with SMTP id b186mr1053894wmc.86.1505999048268; Thu, 21 Sep 2017 06:04:08 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id u33sm1583224wrc.91.2017.09.21.06.04.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Sep 2017 06:04:07 -0700 (PDT) Date: Thu, 21 Sep 2017 14:04:05 +0100 From: Leif Lindholm To: Heyi Guo Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, waip23@126.com Message-ID: <20170921130405.p4gwmpzcwpjigy4p@bivouac.eciton.net> References: <1505991597-52989-1-git-send-email-heyi.guo@linaro.org> <1505991597-52989-12-git-send-email-heyi.guo@linaro.org> MIME-Version: 1.0 In-Reply-To: <1505991597-52989-12-git-send-email-heyi.guo@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v3 06/11] Hisilicon/D05/Pcie: fix bug of size definition X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Sep 2017 13:01:03 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Sep 21, 2017 at 06:59:50PM +0800, Heyi Guo wrote: > From: huangming > > Fix bug of PcieRegion size definition and IO size definition. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang Reviewed-by: Leif Lindholm > --- > Platform/Hisilicon/D05/D05.dsc | 64 ++++++++++---------- > 1 file changed, 32 insertions(+), 32 deletions(-) > > diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc > index aa61c0e..01defe0 100644 > --- a/Platform/Hisilicon/D05/D05.dsc > +++ b/Platform/Hisilicon/D05/D05.dsc > @@ -310,37 +310,37 @@ > gHisiTokenSpaceGuid.PciHb1Rb7Base|0x700a00b0000 > > gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionBaseAddress|0xa8400000 > - gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionSize|0xbeffff > + gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionSize|0xbf0000 > gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionBaseAddress|0xa9400000 > - gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionSize|0xbeffff > + gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionSize|0xbf0000 > gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionBaseAddress|0xa8800000 > - gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionSize|0x77effff > + gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionSize|0x77f0000 > gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionBaseAddress|0xab400000 > - gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionSize|0xbeffff > + gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionSize|0xbf0000 > gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionBaseAddress|0xa9000000 > - gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionSize|0x2feffff > + gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionSize|0x2ff0000 > gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionBaseAddress|0xb0800000 > - gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionSize|0x77effff > + gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionSize|0x77f0000 > gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionBaseAddress|0xac900000 > - gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionSize|0x36effff > + gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionSize|0x36f0000 > gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionBaseAddress|0xb9800000 > - gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionSize|0x67effff > + gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionSize|0x67f0000 > gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionBaseAddress|0x400a8400000 > - gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionSize|0xbeffff > + gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionSize|0xbf0000 > gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionBaseAddress|0x400a9400000 > - gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionSize|0xbeffff > + gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionSize|0xbf0000 > gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionBaseAddress|0x20000000 > - gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xcfffffff > + gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xd0000000 > gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionBaseAddress|0x400ab400000 > - gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionSize|0xbeffff > + gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionSize|0xbf0000 > gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionBaseAddress|0x30000000 > - gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xbfffffff > + gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xc0000000 > gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionBaseAddress|0x40000000 > - gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionSize|0xafffffff > + gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionSize|0xb0000000 > gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionBaseAddress|0x408aa400000 > - gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionSize|0xbeffff > + gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionSize|0xbf0000 > gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionBaseAddress|0x408ab400000 > - gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionSize|0xbeffff > + gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionSize|0xbf0000 > > gHisiTokenSpaceGuid.PcdHb0Rb0CpuMemRegionBase|0xA8400000 > gHisiTokenSpaceGuid.PcdHb0Rb1CpuMemRegionBase|0xA9400000 > @@ -377,52 +377,52 @@ > gHisiTokenSpaceGuid.PcdHb1Rb7CpuIoRegionBase|0x408abff0000 > > gHisiTokenSpaceGuid.PcdHb0Rb0IoBase|0 > - gHisiTokenSpaceGuid.PcdHb0Rb0IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb0Rb0IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb0Rb1IoBase|0 > - gHisiTokenSpaceGuid.PcdHb0Rb1IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb0Rb1IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb0Rb2IoBase|0 > - gHisiTokenSpaceGuid.PcdHb0Rb2IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb0Rb2IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb0Rb3IoBase|0 > - gHisiTokenSpaceGuid.PcdHb0Rb3IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb0Rb3IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb0Rb4IoBase|0 > - gHisiTokenSpaceGuid.PcdHb0Rb4IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb0Rb4IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb0Rb5IoBase|0 > - gHisiTokenSpaceGuid.PcdHb0Rb5IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb0Rb5IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb0Rb6IoBase|0 > - gHisiTokenSpaceGuid.PcdHb0Rb6IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb0Rb6IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb0Rb7IoBase|0 > - gHisiTokenSpaceGuid.PcdHb0Rb7IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb0Rb7IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb1Rb0IoBase|0 > - gHisiTokenSpaceGuid.PcdHb1Rb0IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb1Rb0IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb1Rb1IoBase|0 > - gHisiTokenSpaceGuid.PcdHb1Rb1IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb1Rb1IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb1Rb2IoBase|0 > - gHisiTokenSpaceGuid.PcdHb1Rb2IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb1Rb2IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb1Rb3IoBase|0 > - gHisiTokenSpaceGuid.PcdHb1Rb3IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb1Rb3IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb1Rb4IoBase|0 > - gHisiTokenSpaceGuid.PcdHb1Rb4IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb1Rb4IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb1Rb5IoBase|0 > - gHisiTokenSpaceGuid.PcdHb1Rb5IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb1Rb5IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb1Rb6IoBase|0 > - gHisiTokenSpaceGuid.PcdHb1Rb6IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb1Rb6IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.PcdHb1Rb7IoBase|0 > - gHisiTokenSpaceGuid.PcdHb1Rb7IoSize|0xffff #64K > + gHisiTokenSpaceGuid.PcdHb1Rb7IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.Pcdsoctype|0x1610 > > -- > 1.9.1 >