From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.115; helo=mga14.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6242020945BB8 for ; Thu, 28 Sep 2017 22:37:13 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Sep 2017 22:40:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,451,1500966000"; d="scan'208";a="317565799" Received: from jwang36-mobl2.ccr.corp.intel.com ([10.239.192.40]) by fmsmga004.fm.intel.com with ESMTP; 28 Sep 2017 22:40:16 -0700 From: Jian J Wang To: edk2-devel@lists.01.org Cc: Jiewen Yao , Michael Kinney Date: Fri, 29 Sep 2017 13:40:14 +0800 Message-Id: <20170929054014.6136-1-jian.j.wang@intel.com> X-Mailer: git-send-email 2.14.1.windows.1 Subject: [PATCH] UefiCpuPkg/CpuDxe: Fix assert issue on IA32 platform X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Sep 2017 05:37:14 -0000 This patch is to fix an assert issue during booting IA32 platforms such as OvmfIa32 or Quark. This issue is caused by trying to access page table on a platform without page table. A check is added to avoid the assert. Bug tracker: https://bugzilla.tianocore.org/show_bug.cgi?id=724 c: Star Zeng Cc: Jiewen Yao Cc: Michael Kinney Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- UefiCpuPkg/CpuDxe/CpuDxe.c | 48 ++++++++++++++++++++++++++++++++++++---------- 1 file changed, 38 insertions(+), 10 deletions(-) diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c index 4e8fa100e0..85a520079f 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.c +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c @@ -683,7 +683,7 @@ SetGcdMemorySpaceAttributes ( **/ VOID -RefreshGcdMemoryAttributes ( +RefreshMemoryAttributesFromMtrr ( VOID ) { @@ -704,14 +704,9 @@ RefreshGcdMemoryAttributes ( UINT32 FirmwareVariableMtrrCount; UINT8 DefaultMemoryType; - if (!IsMtrrSupported ()) { - return; - } - FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount (); ASSERT (FirmwareVariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR); - mIsFlushingGCD = TRUE; MemorySpaceMap = NULL; // @@ -862,11 +857,44 @@ RefreshGcdMemoryAttributes ( if (MemorySpaceMap != NULL) { FreePool (MemorySpaceMap); } +} - // - // Update page attributes - // - RefreshGcdMemoryAttributesFromPaging(); +/** + Check if paging is enabled or not. +**/ +BOOLEAN +IsPagingSupported ( + VOID + ) +{ + return ( + (AsmReadCr0 () & BIT31) != 0 + && + (AsmReadCr4 () & BIT5) != 0 + ); +} + +/** + Refreshes the GCD Memory Space attributes according to MTRRs and Paging. + + This function refreshes the GCD Memory Space attributes according to MTRRs + and page tables. + +**/ +VOID +RefreshGcdMemoryAttributes ( + VOID + ) +{ + mIsFlushingGCD = TRUE; + + if (IsMtrrSupported ()) { + RefreshMemoryAttributesFromMtrr (); + } + + if (IsPagingSupported ()) { + RefreshGcdMemoryAttributesFromPaging (); + } mIsFlushingGCD = FALSE; } -- 2.14.1.windows.1