From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::229; helo=mail-wm0-x229.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x229.google.com (mail-wm0-x229.google.com [IPv6:2a00:1450:400c:c09::229]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 15A3D21F3C194 for ; Mon, 9 Oct 2017 11:18:38 -0700 (PDT) Received: by mail-wm0-x229.google.com with SMTP id l68so25811709wmd.5 for ; Mon, 09 Oct 2017 11:22:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=KOX/VCjaXb4qy2CHGBnbiy+HdlAF4rmFaYLfPAF/Bng=; b=gmY7Eh+n1LgLNkhROK97BE8anh1EZfPntFmstDw9tPBZGp2Zg46nENdqdP68EPRO1Y tp43PNOlsXC8ZU5IZ1flOaM9kjiG0y/UDHYc4/rkBODWFY6q70H20eRgWH4yiPEvWkzb Hnr6yKICIO5yOzS/2qd8dJNCtoz4cshx2wueE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=KOX/VCjaXb4qy2CHGBnbiy+HdlAF4rmFaYLfPAF/Bng=; b=Sm5OSkV6Tf+lppGwxXezIMnDW7srXypMrMD4EQ9KRYEoYRCViwSuAMF5CEJCOWj3Kc IJWPUtiUMxT9cvctwNZqwRDj8ExZ8E9acBhfkTSjH1PEqgdUmxZQ5PVkWJTU1Glfe5Sq SKaf60BkM6xtmKVWP/O2+SWGwN5bCOc1gmIGLj1ZZ99kAm0lp978M63VGNJE7xYQqyVH WBW6bwoY/cKzgwmvX5yPCsRjDT3pRuMZY2irYsAunuuAxH0lafUs/C83eqS/k6A8Uuhz gcxl1Rab4wRNiNu+U7nP3kRm9c9si96IjE18PRcOOKBaOZ0pFGO6FXq8Ex+KMMEqJiUK Pr4g== X-Gm-Message-State: AMCzsaVomTFWhJNSLTPgXLJ3NPPSuVxVRsCpqSoM8claRi19nb08OFPM sEXbc89U83wFDHGRy+z0QvsdIg== X-Google-Smtp-Source: AOwi7QCQGd4/438FxqvgKZ5N4osjd+eIsbCd1tipR+seP+kisOtz8MP7LXsOPLejreA17MeWF/Dt7w== X-Received: by 10.28.109.23 with SMTP id i23mr5450195wmc.32.1507573324796; Mon, 09 Oct 2017 11:22:04 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id 5sm3520308wrj.22.2017.10.09.11.22.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 09 Oct 2017 11:22:03 -0700 (PDT) Date: Mon, 9 Oct 2017 19:22:01 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org Message-ID: <20171009182201.qrihzucrxcgcgxxp@bivouac.eciton.net> References: <20171006204152.19376-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20171006204152.19376-1-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH] ArmPkg/ArmSmcPsciResetSystemLib: add support for warm reboot X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 09 Oct 2017 18:18:39 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Oct 06, 2017 at 09:41:52PM +0100, Ard Biesheuvel wrote: > PSCI SYSTEM_RESET is specified as a cold reboot, which does not > preserve the contents of DRAM. In version 1.1, a new reset method > was introduced that allows a warm reboot to be requested. > > This is especially relevant for capsule update, given that it will > invoke a warm reboot before processing the capsule, under the > assumption that the capsule will still be in memory when the PEI > phase is reentered. > > So wire up the [rather inaccurately named] EnterS3WithImmediateWake() > entry point that the capsule update runtime uses to the new PSCI 1.1 > warm reboot. Note that many PSCI implementations will not support this > yet, so fall back to a cold reboot if warm reboot fails. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > --- > > I don't actually need this code for Synquacer, but given that I had > already wrote it, we may just as well merge it. > > ArmPkg/Include/IndustryStandard/ArmStdSmc.h | 10 +++++++--- > ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c | 14 ++++++++++++-- > 2 files changed, 19 insertions(+), 5 deletions(-) > > diff --git a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h > index 593a3ce729ce..41b086947eaa 100644 > --- a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h > +++ b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h > @@ -57,10 +57,12 @@ > #define ARM_SMC_ID_PSCI_MIGRATE_AARCH32 0x84000005 > #define ARM_SMC_ID_PSCI_SYSTEM_OFF 0x84000008 > #define ARM_SMC_ID_PSCI_SYSTEM_RESET 0x84000009 > +#define ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH64 0xc4000012 > +#define ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH32 0x84000012 If we're starting to add more of these, could we do some macro rather than duplication? (see below) > -/* The current PSCI version is: 0.2 */ > -#define ARM_SMC_PSCI_VERSION_MAJOR 0 > -#define ARM_SMC_PSCI_VERSION_MINOR 2 > +/* The current PSCI version is: 1.1 */ > +#define ARM_SMC_PSCI_VERSION_MAJOR 1 > +#define ARM_SMC_PSCI_VERSION_MINOR 1 > #define ARM_SMC_PSCI_VERSION \ > ((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR) > > @@ -93,4 +95,6 @@ > #define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1 > #define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2 > > +#define ARM_SMC_ID_PSCI_SYSTEM_RESET2_WARM 0 > + > #endif > diff --git a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c > index d6d26bce5009..ffd726554c0f 100644 > --- a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c > +++ b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c > @@ -55,7 +55,17 @@ ResetWarm ( > VOID > ) > { > - // Map a warm reset into a cold reset > + ARM_SMC_ARGS ArmSmcArgs; > + > +#if defined(MDE_CPU_AARCH64) > + ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH64; > +#else > + ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH32; > +#endif #define ARM_SMC64_VALUE 0x40000000UL #define ARM_SMC64(x) ((x) | ARM_SMC64_VALUE) #define ARM_SMC32(x) ((x) & ~ARM_SMC64_VALUE) #if defined(MDE_CPU_AARCH64) #define ARM_SMC(x) ARM_SMC64(x) #else #define ARM_SMC(x) ARM_SMC32(x) #endif Want me to whip up a mini-set that does that and changes existing definitiions/invokations? / Leif > + ArmSmcArgs.Arg1 = ARM_SMC_ID_PSCI_SYSTEM_RESET2_WARM; > + ArmCallSmc (&ArmSmcArgs); > + > + // Fall back to cold reset if unsupported > ResetCold (); > } > > @@ -89,7 +99,7 @@ EnterS3WithImmediateWake ( > VOID > ) > { > - // Not implemented > + ResetWarm (); > } > > /** > -- > 2.11.0 >