From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::22d; helo=mail-wm0-x22d.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x22d.google.com (mail-wm0-x22d.google.com [IPv6:2a00:1450:400c:c09::22d]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 253FD21F7D50A for ; Wed, 11 Oct 2017 10:54:07 -0700 (PDT) Received: by mail-wm0-x22d.google.com with SMTP id b189so6888897wmd.4 for ; Wed, 11 Oct 2017 10:57:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=P3HgG+XlNha/nRiHl0Bua5Sa6NT2YPgA3ZmcDldgv6w=; b=MZodNZL5PCPCT++lXOMvLtUjRoaIhopSgHGjHzeriOAt08esaJTKkV//nn5xHzbu/L 5VIGrnWTs3u48MFgwZTNvjaH+3h1XCBweFyxDoIB61HiNstD0g1C7WuEnmbu3pMWencu ptY4O5C6fFJY7q7Aj7Eotc9WACaZviwMRCOj8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=P3HgG+XlNha/nRiHl0Bua5Sa6NT2YPgA3ZmcDldgv6w=; b=R9357bZmjVQJry5bjm2Y6+SU/1JBsmE6gZlrC4ehWiY3t0A3EAIHSODSF7giUHB88R ez/wZfuOIlq9ZFW0GLHa1UCGdEofnBndtlqGH7Llo7gmb8uTAu++04k+X9fi2U+RgbaM TXDhHyCSSJhACI3m+0D4bC75fcNu+xUPgcAUbPc1tway3CfTTREytSf6fRRqnvq4gOjG LsO+Q7IKIezBksN/RcYADfyiqmDu4TGRkDDFFYXIXkWmlTp32FqnmYJYm3W+6pv1TCa5 sdiPkJ2JjXwpBslhQSa+bExgJDRmVzo+oU/iNEsuof4/hEKbIvp9R4zONJ/g2U9w8SwD /D9w== X-Gm-Message-State: AMCzsaXRweP/mK0iMzFwnFvN1PUIwo0Bs7ZEmcMlbmAFgb2QeH9jN986 Cdfv2hwqBSs8EoW7rM3K4doqmw== X-Google-Smtp-Source: AOwi7QA+WKrwSw9S44rf/+F+2mzQfqei8nDljsji6L4/HzuDVuBHBIxPi/j+j5HawrCNnBA7BCEhPA== X-Received: by 10.28.165.150 with SMTP id o144mr366827wme.31.1507744655315; Wed, 11 Oct 2017 10:57:35 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id w4sm4896946wrc.17.2017.10.11.10.57.34 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 Oct 2017 10:57:34 -0700 (PDT) Date: Wed, 11 Oct 2017 18:57:32 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, jsd@semihalf.com Message-ID: <20171011175732.r7nyo55vuno2b6gw@bivouac.eciton.net> References: <1507736449-6073-1-git-send-email-mw@semihalf.com> <1507736449-6073-8-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1507736449-6073-8-git-send-email-mw@semihalf.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [platforms: PATCH 7/8] Marvell/Armada: Armada70x0Lib: Add support for 32-bit ARM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 11 Oct 2017 17:54:07 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Oct 11, 2017 at 05:40:48PM +0200, Marcin Wojtas wrote: > From: Ard Biesheuvel > > Add an ARM implementation of ArmPlatformHelper.S. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm > --- > Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S | 77 ++++++++++++++++++++ > Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf | 3 + > 2 files changed, 80 insertions(+) > > diff --git a/Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S b/Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S > new file mode 100644 > index 0000000..21459e5 > --- /dev/null > +++ b/Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S > @@ -0,0 +1,77 @@ > +//Based on ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S > +// > +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. > +// Copyright (c) 2016, Marvell. All rights reserved. > +// Copyright (c) 2017, Linaro Limited. All rights reserved. > +// > +// This program and the accompanying materials are licensed and made available > +// under the terms and conditions of the BSD License which accompanies this > +// distribution. The full text of the license may be found at > +// http://opensource.org/licenses/bsd-license.php > +// > +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED > +// > + > +#include > +#include > + > +#define CCU_MC_BASE 0xF0001700 > +#define CCU_MC_RCR_OFFSET 0x0 > +#define CCU_MC_RCR_REMAP_EN BIT0 > +#define CCU_MC_RCR_REMAP_SIZE(Size) (((Size) - 1) ^ (SIZE_1MB - 1)) > + > +#define CCU_MC_RSBR_OFFSET 0x4 > +#define CCU_MC_RSBR_SOURCE_BASE(Base) (((Base) >> 20) << 10) > +#define CCU_MC_RTBR_OFFSET 0x8 > +#define CCU_MC_RTBR_TARGET_BASE(Base) (((Base) >> 20) << 10) > + > +ASM_FUNC(ArmPlatformPeiBootAction) > + .if FixedPcdGet64 (PcdSystemMemoryBase) != 0 > + .err PcdSystemMemoryBase should be 0x0 on this platform! > + .endif > + > + .if FixedPcdGet64 (PcdSystemMemorySize) > FixedPcdGet32 (PcdDramRemapTarget) > + // > + // Use the low range for UEFI itself. The remaining memory will be mapped > + // and added to the GCD map later. > + // > + ADRL (r0, mSystemMemoryEnd) > + MOV32 (r2, FixedPcdGet32 (PcdDramRemapTarget) - 1) > + mov r3, #0 > + strd r2, r3, [r0] > + .endif > + > + bx lr > + > +//UINTN > +//ArmPlatformGetCorePosition ( > +// IN UINTN MpId > +// ); > +// With this function: CorePos = (ClusterId * 2) + CoreId > +ASM_FUNC(ArmPlatformGetCorePosition) > + and r1, r0, #ARM_CORE_MASK > + and r0, r0, #ARM_CLUSTER_MASK > + add r0, r1, r0, LSR #7 > + bx lr > + > +//UINTN > +//ArmPlatformGetPrimaryCoreMpId ( > +// VOID > +// ); > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > + MOV32 (r0, FixedPcdGet32(PcdArmPrimaryCore)) > + bx lr > + > +//UINTN > +//ArmPlatformIsPrimaryCore ( > +// IN UINTN MpId > +// ); > +ASM_FUNC(ArmPlatformIsPrimaryCore) > + MOV32 (r1, FixedPcdGet32(PcdArmPrimaryCoreMask)) > + and r0, r0, r1 > + MOV32 (r1, FixedPcdGet32(PcdArmPrimaryCore)) > + cmp r0, r1 > + moveq r0, #1 > + movne r0, #0 > + bx lr > diff --git a/Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf b/Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf > index 838a670..0dabd4b 100644 > --- a/Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf > +++ b/Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf > @@ -60,6 +60,9 @@ > [Sources.AArch64] > AArch64/ArmPlatformHelper.S > > +[Sources.ARM] > + ARM/ArmPlatformHelper.S > + > [FixedPcd] > gArmTokenSpaceGuid.PcdSystemMemoryBase > gArmTokenSpaceGuid.PcdSystemMemorySize > -- > 2.7.4 >