From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::244; helo=mail-wm0-x244.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AB03B202E60EF for ; Fri, 20 Oct 2017 05:56:49 -0700 (PDT) Received: by mail-wm0-x244.google.com with SMTP id q132so22366529wmd.2 for ; Fri, 20 Oct 2017 06:00:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=GX9OVK0UMxZMC0DRCtwOgsXo1HmN2/kT0pjthe3c3UQ=; b=MgD9c1wWX1ng6aDz2Lu4+KGbFEZgdNwnMwwB99YnVFV6M2bvDQEi4V2v88FCnt8PSR sqaCbvfubViV1EjZg6OJkii5cV/f+g5vvFJJ0bVYThJWFZZ+RmZfyleKVyRNyryLVmN1 GKDPCvb28PCEvSMh1tbG8wUBseEG2PNd2wQIs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=GX9OVK0UMxZMC0DRCtwOgsXo1HmN2/kT0pjthe3c3UQ=; b=loBlPzY4DbObw1uJSjvCxTq844QgPJUaqrx8zN4GFSs+0QyaGRDa/O5F31k9bdjxhk 3pK2zak1dPZ+T3HBrbpIslWHdr/D9GjLT57b6f0kZsn+AIbge/GBQDSnMHe5SwEvSvpG LoDl6GXcZ7S6Eq1fCrMZ/N8ts/yves1pHd/xnvPhfGXjfvmjzvWISl1mCI3aoobaKHqp mnR3AnZ/x4zhYzTTmUwSdpoWrcFXawjNVRPbBubOFqYuxpOfYPvPGcRgQ2fvjHygGwNj XWpTrtEmw0kVT1ADRHrqdup3x/TXLF2zu2KMatnHZl5qUo3kSXf5ifRwvUTc6ixaeu75 5vNQ== X-Gm-Message-State: AMCzsaXHuV0GQ0nStIZle1MFZf0aBS+NgviL0s/vtqkBwqRHI2DrY+c6 x78wUV/DM7LwWvw7lJaiHQcJQg== X-Google-Smtp-Source: ABhQp+TlRQsYI7y5oj4C8qxdLclkRvPqjaMhVkTe1KP+5+PPhO8WfZsx6i8Z04Kf3/8a/GujQJZkaw== X-Received: by 10.28.133.2 with SMTP id h2mr1455653wmd.67.1508504427342; Fri, 20 Oct 2017 06:00:27 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id q4sm1249297wmd.19.2017.10.20.06.00.25 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 20 Oct 2017 06:00:26 -0700 (PDT) Date: Fri, 20 Oct 2017 14:00:24 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, lersek@redhat.com Message-ID: <20171020130024.l73uww7cxsjnwbsv@bivouac.eciton.net> References: <20171020112325.10814-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20171020112325.10814-1-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH] ArmPlatformPkg/PrePeiCore: seed temporary stack before entering PEI core X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 20 Oct 2017 12:56:50 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Oct 20, 2017 at 12:23:25PM +0100, Ard Biesheuvel wrote: > DEBUG builds of PEI code will print a diagnostic message regarding > the utilization of temporary RAM before switching to permanent RAM. > For example, > > Total temporary memory: 16352 bytes. > temporary memory stack ever used: 4820 bytes. > temporary memory heap used for HobList: 4720 bytes. > > Tracking stack utilization like this requires the stack to be seeded > with a known magic value, and this needs to occur before entering C > code, given that it uses the stack. Currently, only Nt32Pkg appears > to implement this feature, but it is useful nonetheless, so let's > wire it up for PrePeiCore. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > --- > ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S | 7 +++++++ > ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S | 10 ++++++++++ > ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm | 10 ++++++++++ > 3 files changed, 27 insertions(+) > > diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S > index aab5edab0c42..7a33e2754869 100644 > --- a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S > +++ b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S > @@ -13,6 +13,8 @@ > > #include > > +#define INIT_CAR_VALUE 0x5AA55AA55AA55AA5 > + > ASM_FUNC(_ModuleEntryPoint) > // Do early platform specific actions > bl ASM_PFX(ArmPlatformPeiBootAction) > @@ -84,4 +86,9 @@ _PrepareArguments: > > _SetupPrimaryCoreStack: > mov sp, x1 > + MOV64 (x8, FixedPcdGet64(PcdCPUCoresStackBase)) > + MOV64 (x9, INIT_CAR_VALUE) > +0:stp x9, x9, [x8], #16 > + cmp x8, x1 > + b.lt 0b > b _PrepareArguments > diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S > index 14344425ad4c..7342e49bea59 100644 > --- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S > +++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S > @@ -13,6 +13,8 @@ > > #include > > +#define INIT_CAR_VALUE 0x5AA55AA5 > + Worth moving to a common header somewhere? Also defined/used in MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c. That file has an explicit comment saying "temporary memory is filled with this initial value during SEC phase". Should this end have a corresponding comment saying "checked for during PEI phase"? / Leif > ASM_FUNC(_ModuleEntryPoint) > // Do early platform specific actions > bl ASM_PFX(ArmPlatformPeiBootAction) > @@ -65,6 +67,14 @@ _PrepareArguments: > > _SetupPrimaryCoreStack: > mov sp, r1 > + MOV32 (r8, FixedPcdGet64(PcdCPUCoresStackBase)) > + MOV32 (r9, INIT_CAR_VALUE) > + mov r10, r9 > + mov r11, r9 > + mov r12, r9 > +0:stm r8!, {r9-r12} > + cmp r8, r1 > + blt 0b > b _PrepareArguments > > _NeverReturn: > diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm > index abea675828df..7455de8aa66e 100644 > --- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm > +++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm > @@ -13,6 +13,8 @@ > > #include > > +#define INIT_CAR_VALUE 0x5AA55AA5 > + > INCLUDE AsmMacroIoLib.inc > > IMPORT CEntryPoint > @@ -79,6 +81,14 @@ _PrepareArguments > > _SetupPrimaryCoreStack > mov sp, r1 > + mov32 r8, FixedPcdGet64(PcdCPUCoresStackBase) > + mov32 r9, INIT_CAR_VALUE > + mov r10, r9 > + mov r11, r9 > + mov r12, r9 > +0:stm r8!, {r9-r12} > + cmp r8, r1 > + blt 0b > b _PrepareArguments > > _NeverReturn > -- > 2.11.0 >