From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::242; helo=mail-wr0-x242.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x242.google.com (mail-wr0-x242.google.com [IPv6:2a00:1450:400c:c0c::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 422692034C0A0 for ; Wed, 25 Oct 2017 08:51:19 -0700 (PDT) Received: by mail-wr0-x242.google.com with SMTP id l8so453413wre.12 for ; Wed, 25 Oct 2017 08:55:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=c0CKntSp7FYh5ViBkvRKpZ4D6/xQSVYt9uTLMk3BLjE=; b=AWOud+688BggaHNkaQEnCau2tkW0xBfWsTm0P71cuCi5FngyOiPWsLlwwgtvJ53H8b GD5Ig9aYYzqqhWUq9PGK7IgSW+rK0aXYjQg8Sz4jgoAEgVrAFcYKF6t+yU3ZZAKWeTIn VKC4bPsP6ioZ49YEHEy1aRpi46p0qRCHozXAc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=c0CKntSp7FYh5ViBkvRKpZ4D6/xQSVYt9uTLMk3BLjE=; b=te3QS6Jr5zxycoOMuHZoNIAT6Y3vuPfQ1doY8EZUdC+8iO0YwHqAkjFyZTKoSmow2U BzguoZSAa9Hi53vIdygKPKZpFpv5FybWgOZbr5IYqMqKapq37VSIus5klCtHCiXUvj4w Kk4yGL7AFdo9GC97h24Iws1d9yiMELS4aIb+WLJSfoyu460H7A5RbkQMfZrfmhUm3c5u H+Fgqp4+xy5Eh/myaTYheKw2IcUrOjWLKGIwSwczGf5q3LGBuwVXkc3ksFsjLKgqFd5u SYE0v7CawKeS3/8PA4IHsshJK8tTtDnhnpI/Hx6csMKrWD6GjG88jFoy4xU9lucOKMgm g32g== X-Gm-Message-State: AMCzsaXdCIm8nX3xrRmwkdDM2oUgIpgq8jblbwvnMrdkh4zu72F1m8k0 EUQOqN5Q75AKRIjEqfTApSR0FQ== X-Google-Smtp-Source: ABhQp+RM8IcVweNCp0RJGfMe6l/rOjAqsZGcIS52+ciIM1bolP7A9zV6MLz4k1Q9/h8z+PsLfwfcuQ== X-Received: by 10.223.158.7 with SMTP id u7mr2736949wre.277.1508946902897; Wed, 25 Oct 2017 08:55:02 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id n30sm2794453wra.39.2017.10.25.08.55.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 25 Oct 2017 08:55:01 -0700 (PDT) Date: Wed, 25 Oct 2017 16:55:00 +0100 From: Leif Lindholm To: Marcin Wojtas Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, jsd@semihalf.com Message-ID: <20171025155500.bkek4xptbmddqipy@bivouac.eciton.net> References: <1508944693-16315-1-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1508944693-16315-1-git-send-email-mw@semihalf.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [platforms: PATCH v3 0/8] Armada 7k/8k - memory improvements X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Oct 2017 15:51:19 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Oct 25, 2017 at 05:18:10PM +0200, Marcin Wojtas wrote: > Hi, > > In the third round I resend only 3 patches. > > The patches are available in the github: > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/mem-upstream-r20171025-2 Many thanks - all remaining patches in series: Reviewed-by: Leif Lindholm Pushed as 1727ed8024..5fc9a86fb3 / Leif > Best regards, > Marcin > > Changelog: > v2->v3 > 1/8 > - Add RB > > 4/8 > - Improve and correct commit message > > 6/8 > - Improve if statement for decoding region size code > > v1->v2 > 1/8 > - Add comment for calling Stall > > 4/8 > - s/VirtualMemoryTable/mVirtualMemoryTable/ > - restore ASSERT for table elements > - correct commit log (s/ATF/ARM-TF/) > - add dynamic remap enable/parameters detection > - move config space base address to PCD > - use macros > > 6/8 > - s/DramSizeGet/GetDramSize/ > - add 'IN OUT' to GetDramSize argument > - s/AreaLengthMap/RegionCode/ > - use macros to hide arithmetics and increase readability > - replace humongous switch/case with small if/else > > 2/8, 3/8, 5/8, 7/8, 8/8 > - Add RBs > > Ard Biesheuvel (5): > Marvell/Armada: Implement EFI_RNG_PROTOCOL driver for EIP76 TRNG > Marvell/Armada: Increase preallocated memory region size > Marvell/Armada: Add MemoryInitPeiLib that reserves secure region > Marvell/Armada: Armada70x0Lib: Add support for 32-bit ARM > Marvell/Armada: Add 32-bit ARM support > > Marcin Wojtas (3): > Marvell/Armada: Remove custom reset library residues > Marvell/Armada: Add support for DRAM remapping > Marvell/Armada: Enable dynamic DRAM size detection > > Platform/Marvell/Armada/Armada.dsc.inc | 21 +- > Platform/Marvell/Armada/Armada70x0.dsc | 8 +- > Platform/Marvell/Armada/Armada70x0.fdf | 3 +- > Platform/Marvell/Armada/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.c | 255 ++++++++++++++++++++ > Platform/Marvell/Armada/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.inf | 47 ++++ > Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S | 77 ++++++ > Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf | 5 + > Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c | 149 ++++++++++-- > Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.h | 73 ++++++ > Platform/Marvell/Armada/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.c | 158 ++++++++++++ > Platform/Marvell/Armada/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.inf | 46 ++++ > Platform/Marvell/Marvell.dec | 18 +- > Silicon/Marvell/Documentation/PortingGuide.txt | 9 - > 13 files changed, 823 insertions(+), 46 deletions(-) > create mode 100644 Platform/Marvell/Armada/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.c > create mode 100644 Platform/Marvell/Armada/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.inf > create mode 100644 Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S > create mode 100644 Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.h > create mode 100644 Platform/Marvell/Armada/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.c > create mode 100644 Platform/Marvell/Armada/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.inf > > -- > 2.7.4 >