From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::241; helo=mail-wr0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x241.google.com (mail-wr0-x241.google.com [IPv6:2a00:1450:400c:c0c::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1D1A22034CF7A for ; Wed, 25 Oct 2017 10:56:39 -0700 (PDT) Received: by mail-wr0-x241.google.com with SMTP id j15so831064wre.8 for ; Wed, 25 Oct 2017 11:00:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IPr7AbXPPgixWsBE7QeQvFZqBjvEI/igEvxr7mqMwYs=; b=kRyJtY2YX0aJbQLmg/HASIR96IMdMbf9Vzb3XDqe1LEqilGOlui5o8OUDV0PqhrdSn B9uqt5ifViSo/1ngEM75bYQfFAdWj+xaxwwA37/Z0cn7c5M65etyzu+/OMtnNMjGl/RI uCQ7GcvNuGAm7UJYX1OYtemjFZ0SU8JgQENxc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IPr7AbXPPgixWsBE7QeQvFZqBjvEI/igEvxr7mqMwYs=; b=hjz2bUlULwng2NloD5U2O78FeYM+jj8wp+aFlzhgXKBKk1bvMtTw1OuXpOSPRTDv7W hZjbIQOqlhQ18DtTGSpCjPqP3UT6NF4wYrd/yFv6oiRbG+0bdttvfLLkHGpTpsunYWYk lwoKb4IIJKjsALO4OelA9SIuQEIn6lWRLiL9jw9pTy710lMyVJH19PefMaLKH78BJAmG Hw4a/3tQWkNPBukekaPvtyAbqZoZ/FJWB2+h0UxRPIXcQx+uF4r6YyehrxDuE797QclU CuOcJOGMZXDHuKyFfTy3SsMI2DI8JwITFdMmjyuaxUqHnjaTxdHbg80t/G79U3ygqaFl lWDA== X-Gm-Message-State: AMCzsaU1OyfYThbhHYDepuCvHKkc5jRxCA6zb4eSZnb1jTNRV+uX0fxA Xs6xTKcd99HcBIHoBmD8vDd3u1ZrI1k= X-Google-Smtp-Source: ABhQp+SdDZY5X+FIg3fCoj+UyWaZXZ9r5mqNRh0zt4qMESUh9LCBfL0RA6o88Cr7feA+9+G8Gc7gtA== X-Received: by 10.223.134.25 with SMTP id 25mr3200805wrv.186.1508954422631; Wed, 25 Oct 2017 11:00:22 -0700 (PDT) Received: from localhost.localdomain ([160.161.173.60]) by smtp.gmail.com with ESMTPSA id y29sm3255305wrd.3.2017.10.25.11.00.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 25 Oct 2017 11:00:21 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Cc: daniel.thompson@linaro.org, masami.hiramatsu@linaro.org Date: Wed, 25 Oct 2017 18:59:36 +0100 Message-Id: <20171025175947.22798-13-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171025175947.22798-1-ard.biesheuvel@linaro.org> References: <20171025175947.22798-1-ard.biesheuvel@linaro.org> Subject: [PATCH edk2-platforms v2 12/23] Silicon/SynQuacer: add NorFlashPlatformLib implementation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Oct 2017 17:56:39 -0000 Add the platform glue for the NOR flash driver. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c | 70 ++++++++++++++++++++ Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacerLib.inf | 41 ++++++++++++ 2 files changed, 111 insertions(+) diff --git a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c new file mode 100644 index 000000000000..816d8ba33f8c --- /dev/null +++ b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c @@ -0,0 +1,70 @@ +/** @file + + Copyright (c) 2011-2014, ARM Ltd. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + **/ + +#include +#include +#include +#include + +#include + +STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = { + { + // UEFI code region + SYNQUACER_SPI_NOR_BASE, // device base + FixedPcdGet64 (PcdFdBaseAddress), // region base + FixedPcdGet32 (PcdFdSize), // region size + SIZE_64KB, // block size + { + 0x19c118b0, 0xc423, 0x42be, { 0xb8, 0x0f, 0x70, 0x6f, 0x1f, 0xcb, 0x59, 0x9a } + } + }, + { + // Environment variable region + SYNQUACER_SPI_NOR_BASE, // device base + FixedPcdGet32 (PcdFlashNvStorageVariableBase), // region base + FixedPcdGet32 (PcdFlashNvStorageVariableSize) + + FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + + FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize), // region size + SIZE_64KB, // block size + { + 0x3105bd7a, 0x82c3, 0x486f, { 0xb1, 0x03, 0x1e, 0x09, 0x54, 0xec, 0x85, 0x75 } + } + }, +}; + +EFI_STATUS +NorFlashPlatformInitialization ( + VOID + ) +{ + return EFI_SUCCESS; +} + +EFI_STATUS +NorFlashPlatformGetDevices ( + OUT NOR_FLASH_DESCRIPTION **NorFlashDevices, + OUT UINT32 *Count + ) +{ + if (NorFlashDevices == NULL || + Count == NULL) { + return EFI_INVALID_PARAMETER; + } + + *Count = ARRAY_SIZE (mNorFlashDevices); + *NorFlashDevices = mNorFlashDevices; + + return EFI_SUCCESS; +} diff --git a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacerLib.inf b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacerLib.inf new file mode 100644 index 000000000000..2a8fd209f5e3 --- /dev/null +++ b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacerLib.inf @@ -0,0 +1,41 @@ +#/** @file +# +# Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = NorFlashSynQuacerLib + FILE_GUID = 8279227C-C555-4D75-B439-D8A959635CDD + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = NorFlashPlatformLib + +[Sources] + NorFlashSynQuacer.c + +[Packages] + ArmPlatformPkg/ArmPlatformPkg.dec + ArmPkg/ArmPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Socionext/SynQuacer/SynQuacer.dec + +[LibraryClasses] + BaseLib + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdBaseAddress + gArmTokenSpaceGuid.PcdFdSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize -- 2.11.0