From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::241; helo=mail-wm0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E3B8B20352601 for ; Wed, 25 Oct 2017 10:56:47 -0700 (PDT) Received: by mail-wm0-x241.google.com with SMTP id q124so3476500wmb.0 for ; Wed, 25 Oct 2017 11:00:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Nn25QSCKzH1jfl05K10PaPL9sbHMIsjVIamh5SQ6vrs=; b=J2k3TCO/B3uzdEqBJx+05L1Vh7e3+2r3e7GTApQQBx2il8pJZtinwgU/ukMhXSpJJn eQw5OE0IPsIOEMghdRvGk6GyKBJH/KehB7b3R5i0GbP8UgiVHdG/rFp8Ap2c+V8BLHN+ 97fWR+w3TMjRPATWS8kCxhYDS1qhzg71XeF84= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Nn25QSCKzH1jfl05K10PaPL9sbHMIsjVIamh5SQ6vrs=; b=RmXgoTM47hcjeLhElLUWco9Q+H0o8EEmtiG7cs6hXoZLLeMJqf1zLZ2Kh8vEZYDlpW O+JCGMFuut4yLOGierzohnc1a5XzbZTY+CXvTaaGau1nsWDMXeBNcGY3wyRF41hTMiTw lhep7doHL5W/OpGPPmGvuPHSXkQyowSy1un227nkrZo2m+Y4bor9p2S1eu1CBEEElLjL wRC8rSFRclE2UmRrzbHAv77HZyCf/WfKPXujyXTJiEBuRjplEh0nOTh7v7XKNHZAifc/ nn9zw4/RhC/f+y2JqWEaS8VcsVLFqzbxkpY4wiAMGH5WU1f/u1gl7pn5YPAZeK54+oCH S/lQ== X-Gm-Message-State: AMCzsaUI9BM+9XHcH2wgJVvObZxqoK5QdE6YokNhamIu08z6BQlCQIvs Jm6C8nrhSguVZusYOhxCfKf2YCqjPp8= X-Google-Smtp-Source: ABhQp+TtjITfJWROegGZGUxBRZPEgD27ozMXwUsKwTQYEO8Z0deoLJoiaF2pS4iJ55xph61NytgtpQ== X-Received: by 10.28.13.135 with SMTP id 129mr2697121wmn.24.1508954431490; Wed, 25 Oct 2017 11:00:31 -0700 (PDT) Received: from localhost.localdomain ([160.161.173.60]) by smtp.gmail.com with ESMTPSA id y29sm3255305wrd.3.2017.10.25.11.00.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 25 Oct 2017 11:00:30 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Cc: daniel.thompson@linaro.org, masami.hiramatsu@linaro.org Date: Wed, 25 Oct 2017 18:59:40 +0100 Message-Id: <20171025175947.22798-17-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171025175947.22798-1-ard.biesheuvel@linaro.org> References: <20171025175947.22798-1-ard.biesheuvel@linaro.org> Subject: [PATCH edk2-platforms v2 16/23] SynQuacer/SynQuacerMemoryInitPeiLib: add capsule support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Oct 2017 17:56:48 -0000 Add support for dealing with capsules left in memory by the OS before reboot. This needs to be done early, before the memory is reused, which is why the initial handling must reside here. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c | 59 +++++++++++++++++++- Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf | 12 ++++ 2 files changed, 70 insertions(+), 1 deletion(-) diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c index 9359f7c320b7..a249210a3192 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c @@ -17,12 +17,17 @@ #include #include +#include #include #include +#include +#include #include #include +#include + #define ARM_MEMORY_REGION(Base, Size) \ { (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK } @@ -39,7 +44,8 @@ BuildMemoryTypeInformationHob ( STATIC ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] = { // Memory mapped SPI NOR flash - ARM_UNCACHED_REGION (SYNQUACER_SPI_NOR_BASE, SYNQUACER_SPI_NOR_BASE), + ARM_UNCACHED_REGION (FixedPcdGet64 (PcdFdBaseAddress), + FixedPcdGet32 (PcdFdSize)), // DDR - 2 GB ARM_MEMORY_REGION (SYNQUACER_SYSTEM_MEMORY_1_BASE, @@ -113,6 +119,12 @@ MemoryPeim ( { EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; RETURN_STATUS Status; + EFI_PEI_SERVICES **PeiServices; + PEI_CAPSULE_PPI *Capsule; + VOID *CapsuleBuffer; + UINTN CapsuleBufferLength; + EFI_STATUS EfiStatus; + BOOLEAN HaveCapsule; ResourceAttributes = EFI_RESOURCE_ATTRIBUTE_PRESENT | @@ -140,12 +152,57 @@ MemoryPeim ( // SYNQUACER_SYSTEM_MEMORY_3_BASE, // SYNQUACER_SYSTEM_MEMORY_3_SZ); + PeiServices = (EFI_PEI_SERVICES **) GetPeiServicesTablePointer (); + ASSERT (PeiServices != NULL); + + EfiStatus = PeiServicesLocatePpi (&gPeiCapsulePpiGuid, 0, NULL, + (VOID **)&Capsule); + ASSERT_EFI_ERROR (EfiStatus); + + // + // Check for persistent capsules + // + HaveCapsule = FALSE; + EfiStatus = Capsule->CheckCapsuleUpdate (PeiServices); + if (!EFI_ERROR (EfiStatus)) { + + // + // Coalesce the capsule into unused memory. CreateState() below will copy + // it to a properly allocated buffer. + // + CapsuleBuffer = (VOID *)FixedPcdGet64 (PcdSystemMemoryBase); + CapsuleBufferLength = UefiMemoryBase - FixedPcdGet64 (PcdSystemMemoryBase); + + PeiServicesSetBootMode (BOOT_ON_FLASH_UPDATE); + + EfiStatus = Capsule->Coalesce (PeiServices, &CapsuleBuffer, + &CapsuleBufferLength); + if (!EFI_ERROR (EfiStatus)) { + DEBUG ((DEBUG_INFO, "%a: Coalesced capsule @ %p (0x%lx)\n", + __FUNCTION__, CapsuleBuffer, CapsuleBufferLength)); + HaveCapsule = TRUE; + } else { + DEBUG ((DEBUG_WARN, "%a: failed to coalesce() capsule (Status == %r)\n", + __FUNCTION__, EfiStatus)); + } + } + Status = ArmConfigureMmu (mVirtualMemoryTable, NULL, NULL); ASSERT_EFI_ERROR (Status); if (EFI_ERROR (Status)) { return Status; } + if (HaveCapsule) { + EfiStatus = Capsule->CreateState (PeiServices, CapsuleBuffer, + CapsuleBufferLength); + + if (EFI_ERROR (EfiStatus)) { + DEBUG ((DEBUG_WARN, "%a: Capsule->CreateState failed (Status == %r)\n", + __FUNCTION__, EfiStatus)); + } + } + if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) { // Optional feature that helps prevent EFI memory map fragmentation. BuildMemoryTypeInformationHob (); diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf index 1ddaee8a9d45..d294c943d7f9 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf @@ -36,14 +36,20 @@ [Packages] [LibraryClasses] ArmLib ArmMmuLib + CacheMaintenanceLib DebugLib + PeiServicesLib + PeiServicesTablePointerLib [FeaturePcd] gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob [FixedPcd] + gArmTokenSpaceGuid.PcdFdBaseAddress + gArmTokenSpaceGuid.PcdFdSize gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase + gArmTokenSpaceGuid.PcdSystemMemoryBase gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase @@ -53,3 +59,9 @@ [FixedPcd] gNetsecDxeTokenSpaceGuid.PcdEepRomBase gFip006DxeTokenSpaceGuid.PcdFip006DxeRegBaseAddress gFip006DxeTokenSpaceGuid.PcdFip006DxeMemBaseAddress + +[Ppis] + gPeiCapsulePpiGuid + +[Depex] + gPeiCapsulePpiGuid -- 2.11.0