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From: Leif Lindholm <leif.lindholm@linaro.org>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: edk2-devel@lists.01.org, daniel.thompson@linaro.org,
	masami.hiramatsu@linaro.org
Subject: Re: [PATCH edk2-platforms v2 01/23] Silicon/SynQuacer: add package with platform headers
Date: Thu, 26 Oct 2017 15:39:58 +0100	[thread overview]
Message-ID: <20171026143958.q4t3kay4boq7xuk6@bivouac.eciton.net> (raw)
In-Reply-To: <20171025175947.22798-2-ard.biesheuvel@linaro.org>

On Wed, Oct 25, 2017 at 06:59:25PM +0100, Ard Biesheuvel wrote:
> Add a package .DEC description for SynQuacer with an [Includes]
> section, and add header files containing descriptions of the
> platform's memory map and PCIe configuration. No code yet.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Special thanks for the tedious name case-change.

> ---
>  Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 69 ++++++++++++++++++++
>  Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h      | 63 ++++++++++++++++++
>  Silicon/Socionext/SynQuacer/SynQuacer.dec                | 20 ++++++
>  3 files changed, 152 insertions(+)
> 
> diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
> new file mode 100644
> index 000000000000..a53b9088c3af
> --- /dev/null
> +++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
> @@ -0,0 +1,69 @@
> +/** @file
> +  Physical memory map for SynQuacer
> +
> +  Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
> +
> +  This program and the accompanying materials are licensed and made available
> +  under the terms and conditions of the BSD License which accompanies this
> +  distribution.  The full text of the license may be found at
> +  http://opensource.org/licenses/bsd-license.php.
> +
> +  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
> +  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#ifndef _SYNQUACER_PLATFORM_MEMORYMAP_H_
> +#define _SYNQUACER_PLATFORM_MEMORYMAP_H_
> +
> +// Memory mapped SPI NOR
> +#define SYNQUACER_SPI_NOR_BASE          0x08000000
> +#define SYNQUACER_SPI_NOR_SIZE          SIZE_128MB
> +
> +// On-Chip non-secure ROM
> +#define SYNQUACER_NON_SECURE_ROM_BASE   0x1F000000
> +#define SYNQUACER_NON_SECURE_ROM_SZ     SIZE_512KB
> +
> +// On-Chip Peripherals
> +#define SYNQUACER_PERIPHERALS_BASE      0x20000000
> +#define SYNQUACER_PERIPHERALS_SZ        0x0E000000
> +
> +// On-Chip non-secure SRAM
> +#define SYNQUACER_NON_SECURE_SRAM_BASE  0x2E000000
> +#define SYNQUACER_NON_SECURE_SRAM_SZ    SIZE_64KB
> +
> +// GIC-500
> +#define SYNQUACER_GIC500_DIST_BASE      FixedPcdGet64 (PcdGicDistributorBase)
> +#define SYNQUACER_GIC500_DIST_SIZE      SIZE_256KB
> +#define SYNQUACER_GIC500_RDIST_BASE     FixedPcdGet64 (PcdGicRedistributorsBase)
> +#define SYNQUACER_GIC500_RDIST_SIZE     SIZE_8MB
> +
> +// GPIO block
> +#define SYNQUACER_GPIO_BASE             0x51000000
> +#define SYNQUACER_GPIO_SIZE             SIZE_4KB
> +
> +// eMMC(SDH30)
> +#define SYNQUACER_EMMC_BASE             0x52300000
> +#define SYNQUACER_EMMC_BASE_SZ          SIZE_4KB
> +
> +#define SYNQUACER_EEPROM_BASE           0x10000000
> +#define SYNQUACER_EEPROM_BASE_SZ        SIZE_64KB
> +
> +// NETSEC
> +#define SYNQUACER_NETSEC_BASE           0x522D0000
> +#define SYNQUACER_NETSEC_BASE_SZ        SIZE_64KB
> +
> +#define SYNQUACER_SYSTEM_MEMORY_1_BASE  0x80000000
> +#define SYNQUACER_SYSTEM_MEMORY_1_SZ    (SIZE_2GB - SIZE_16MB)
> +
> +#define SYNQUACER_SYSTEM_MEMORY_2_BASE  0x0880000000ULL
> +#define SYNQUACER_SYSTEM_MEMORY_2_SZ    (SIZE_32GB - SIZE_2GB)
> +
> +#define SYNQUACER_SYSTEM_MEMORY_3_BASE  0x8800000000ULL
> +#define SYNQUACER_SYSTEM_MEMORY_3_SZ    SIZE_32GB
> +
> +// PCI
> +#define SYNQUACER_PCIE_BASE             0x58200000
> +#define SYNQUACER_PCIE_SIZE             0x00200000
> +
> +#endif
> diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h b/Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h
> new file mode 100644
> index 000000000000..d2a3f9acbf49
> --- /dev/null
> +++ b/Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h
> @@ -0,0 +1,63 @@
> +/** @file
> +  PCI memory configuration for SynQuacer
> +
> +  Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
> +
> +  This program and the accompanying materials are licensed and made available
> +  under the terms and conditions of the BSD License which accompanies this
> +  distribution.  The full text of the license may be found at
> +  http://opensource.org/licenses/bsd-license.php.
> +
> +  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
> +  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#ifndef _SYNQUACER_PLATFORM_PCI_H_
> +#define _SYNQUACER_PLATFORM_PCI_H_
> +
> +#define SYNQUACER_PCI_SEG0_CONFIG_BASE      0x60000000
> +#define SYNQUACER_PCI_SEG0_CONFIG_SIZE      0x07f00000
> +#define SYNQUACER_PCI_SEG0_DBI_BASE         0x583d0000
> +#define SYNQUACER_PCI_SEG0_EXS_BASE         0x58390000
> +
> +#define SYNQUACER_PCI_SEG0_BUSNUM_MIN       0x0
> +#define SYNQUACER_PCI_SEG0_BUSNUM_MAX       0x7e
> +
> +#define SYNQUACER_PCI_SEG0_PORTIO_MIN       0x0
> +#define SYNQUACER_PCI_SEG0_PORTIO_MAX       0xffff
> +#define SYNQUACER_PCI_SEG0_PORTIO_SIZE      0x10000
> +#define SYNQUACER_PCI_SEG0_PORTIO_MEMBASE   0x67f00000
> +#define SYNQUACER_PCI_SEG0_PORTIO_MEMSIZE   SYNQUACER_PCI_SEG0_PORTIO_SIZE
> +
> +#define SYNQUACER_PCI_SEG0_MMIO32_MIN       0x68000000
> +#define SYNQUACER_PCI_SEG0_MMIO32_MAX       0x6fffffff
> +#define SYNQUACER_PCI_SEG0_MMIO32_SIZE      0x08000000
> +
> +#define SYNQUACER_PCI_SEG0_MMIO64_MIN       0x3e00000000
> +#define SYNQUACER_PCI_SEG0_MMIO64_MAX       0x3effffffff
> +#define SYNQUACER_PCI_SEG0_MMIO64_SIZE      0x100000000
> +
> +#define SYNQUACER_PCI_SEG1_CONFIG_BASE      0x70000000
> +#define SYNQUACER_PCI_SEG1_CONFIG_SIZE      0x07f00000
> +#define SYNQUACER_PCI_SEG1_DBI_BASE         0x583c0000
> +#define SYNQUACER_PCI_SEG1_EXS_BASE         0x58380000
> +
> +#define SYNQUACER_PCI_SEG1_BUSNUM_MIN       0x0
> +#define SYNQUACER_PCI_SEG1_BUSNUM_MAX       0x7e
> +
> +#define SYNQUACER_PCI_SEG1_PORTIO_MIN       0x10000
> +#define SYNQUACER_PCI_SEG1_PORTIO_MAX       0x1ffff
> +#define SYNQUACER_PCI_SEG1_PORTIO_SIZE      0x10000
> +#define SYNQUACER_PCI_SEG1_PORTIO_MEMBASE   0x77f00000
> +#define SYNQUACER_PCI_SEG1_PORTIO_MEMSIZE   SYNQUACER_PCI_SEG1_PORTIO_SIZE
> +
> +#define SYNQUACER_PCI_SEG1_MMIO32_MIN       0x78000000
> +#define SYNQUACER_PCI_SEG1_MMIO32_MAX       0x7fffffff
> +#define SYNQUACER_PCI_SEG1_MMIO32_SIZE      0x08000000
> +
> +#define SYNQUACER_PCI_SEG1_MMIO64_MIN       0x3f00000000
> +#define SYNQUACER_PCI_SEG1_MMIO64_MAX       0x3fffffffff
> +#define SYNQUACER_PCI_SEG1_MMIO64_SIZE      0x100000000
> +
> +#endif
> diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> new file mode 100644
> index 000000000000..c3adf85d3562
> --- /dev/null
> +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> @@ -0,0 +1,20 @@
> +#
> +#  Copyright (c) 2017, Linaro, Ltd. All rights reserved.
> +#
> +#  This program and the accompanying materials
> +#  are licensed and made available under the terms and conditions of the BSD License
> +#  which accompanies this distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +[Defines]
> +  DEC_SPECIFICATION              = 0x0001001A
> +  PACKAGE_NAME                   = SynQuacer
> +  PACKAGE_GUID                   = 9c782fd2-7db1-438d-b51c-2155cee2c5cc
> +  PACKAGE_VERSION                = 0.1
> +
> +[Includes]
> +  Include
> -- 
> 2.11.0
> 


  reply	other threads:[~2017-10-26 14:36 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-25 17:59 [PATCH edk2-platforms v2 00/23] add support for Socionext Synquacer Ard Biesheuvel
2017-10-25 17:59 ` [PATCH edk2-platforms v2 01/23] Silicon/SynQuacer: add package with platform headers Ard Biesheuvel
2017-10-26 14:39   ` Leif Lindholm [this message]
2017-10-25 17:59 ` [PATCH edk2-platforms v2 02/23] Silicon/Socionext: add driver for NETSEC network controller Ard Biesheuvel
2017-10-26 14:49   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 03/23] Silicon/SynQuacer: add MemoryInitPeiLib implementation Ard Biesheuvel
2017-10-26 14:56   ` Leif Lindholm
2017-10-26 14:57     ` Ard Biesheuvel
2017-10-26 15:05       ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 04/23] Platform: add support for Socionext SynQuacer eval board Ard Biesheuvel
2017-10-26 15:02   ` Leif Lindholm
2017-10-26 15:14     ` Ard Biesheuvel
2017-10-25 17:59 ` [PATCH edk2-platforms v2 05/23] Silicon/SynQuacer: implement PciSegmentLib to support dual RCs Ard Biesheuvel
2017-10-26 15:06   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 06/23] Silicon/SynQuacer: implement PciHostBridgeLib support Ard Biesheuvel
2017-10-26 15:10   ` Leif Lindholm
2017-10-26 15:12     ` Ard Biesheuvel
2017-10-25 17:59 ` [PATCH edk2-platforms v2 07/23] Silicon/SynQuacer: implement EFI_CPU_IO2_PROTOCOL Ard Biesheuvel
2017-10-26 15:13   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 08/23] Platform/SynQuacerEvalBoard: add PCI support Ard Biesheuvel
2017-10-26 15:38   ` Leif Lindholm
2017-10-26 15:41     ` Ard Biesheuvel
2017-10-26 21:49       ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 09/23] Platform/SynQuacerEvalBoard: add NETSEC driver Ard Biesheuvel
2017-10-26 15:39   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 10/23] Silicon/SynQuacer: add ACPI support Ard Biesheuvel
2017-10-26 17:13   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 11/23] Silicon/SynQuacer: add device tree support for eval board Ard Biesheuvel
2017-10-26 17:15   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 12/23] Silicon/SynQuacer: add NorFlashPlatformLib implementation Ard Biesheuvel
2017-10-25 17:59 ` [PATCH edk2-platforms v2 13/23] Silicon/Socionext: add driver for SPI NOR flash Ard Biesheuvel
2017-10-26 21:19   ` Leif Lindholm
2017-10-28 14:16     ` Ard Biesheuvel
2017-10-28 21:31       ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 14/23] Platform/SynQuacer: incorporate NOR flash and variable drivers Ard Biesheuvel
2017-10-25 17:59 ` [PATCH edk2-platforms v2 15/23] Silicon/SynQuacer: implement PlatformFlashAccessLib Ard Biesheuvel
2017-10-26 21:22   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 16/23] SynQuacer/SynQuacerMemoryInitPeiLib: add capsule support Ard Biesheuvel
2017-10-26 21:27   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 17/23] Socionext/SynQuacerEvalBoard: wire up basic " Ard Biesheuvel
2017-10-26 21:28   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 18/23] Socionext/SynQuacerEvalBoard: switch to execute in place Ard Biesheuvel
2017-10-26 21:30   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 19/23] Platform/SynQuacerEvalBoard: add signed capsule update support Ard Biesheuvel
2017-10-26 21:33   ` Leif Lindholm
2017-10-28 13:48     ` Ard Biesheuvel
2017-10-25 17:59 ` [PATCH edk2-platforms v2 20/23] Silicon/SynQuacer/AcpiTables: hide PCI domain #0 Ard Biesheuvel
2017-10-26 21:34   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 21/23] Silicon/SynQuacerPciHostBridgeLib: add workaround to support 32-bit only cards Ard Biesheuvel
2017-10-26 21:35   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 22/23] Platform/Socionext: add support for Socionext Developer Box rev 0.1 Ard Biesheuvel
2017-10-26 21:46   ` Leif Lindholm
2017-10-25 17:59 ` [PATCH edk2-platforms v2 23/23] Platform/DeveloperBox: add ConsolePrefDxe driver Ard Biesheuvel
2017-10-26 21:46   ` Leif Lindholm

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