Re: [PATCH edk2-platforms v2 06/23] Silicon/SynQuacer: implement PciHostBridgeLib support

[Leif Lindholm <leif.lindholm@linaro.org>]

On Wed, Oct 25, 2017 at 06:59:30PM +0100, Ard Biesheuvel wrote:
> Implement the glue library that exposes the PCIe root complexes to
> the generic PCI host bridge driver. Since that driver is the first
> one to access the PCI config space, put the low level init code for
> the RCs into this library's constructor.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
>  Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.c            | 220 +++++++++++
>  Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf          |  50 +++
>  Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLibConstructor.c | 388 ++++++++++++++++++++
>  3 files changed, 658 insertions(+)
> 
> diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.c
> new file mode 100644
> index 000000000000..3937e98c0213
> --- /dev/null
> +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.c
> @@ -0,0 +1,220 @@
> +/** @file
> +  PCI Host Bridge Library instance for Socionext SynQuacer ARM SOC
> +
> +  Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
> +
> +  This program and the accompanying materials are licensed and made available
> +  under the terms and conditions of the BSD License which accompanies this
> +  distribution.  The full text of the license may be found at
> +  http://opensource.org/licenses/bsd-license.php.
> +
> +  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
> +  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include <PiDxe.h>
> +#include <IndustryStandard/Pci22.h>
> +#include <Library/DebugLib.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/PciHostBridgeLib.h>
> +#include <Platform/Pcie.h>
> +#include <Protocol/PciHostBridgeResourceAllocation.h>
> +#include <Protocol/PciRootBridgeIo.h>
> +
> +#pragma pack(1)
> +typedef struct {
> +  ACPI_HID_DEVICE_PATH     AcpiDevicePath;
> +  EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
> +} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
> +#pragma pack ()
> +
> +STATIC CONST EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[] = {
> +  {
> +    {
> +      {
> +        ACPI_DEVICE_PATH,
> +        ACPI_DP,
> +        {
> +          (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
> +          (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
> +        }
> +      },
> +      EISA_PNP_ID (0x0A08), // PCI Express
> +      0
> +    },
> +
> +    {
> +      END_DEVICE_PATH_TYPE,
> +      END_ENTIRE_DEVICE_PATH_SUBTYPE,
> +      {
> +        END_DEVICE_PATH_LENGTH,
> +        0
> +      }
> +    }
> +  },
> +  {
> +    {
> +      {
> +        ACPI_DEVICE_PATH,
> +        ACPI_DP,
> +        {
> +          (UINT8)(sizeof(ACPI_HID_DEVICE_PATH)),
> +          (UINT8)(sizeof(ACPI_HID_DEVICE_PATH) >> 8)
> +        }
> +      },
> +      EISA_PNP_ID (0x0A08), // PCI Express
> +      1
> +    },
> +
> +    {
> +      END_DEVICE_PATH_TYPE,
> +      END_ENTIRE_DEVICE_PATH_SUBTYPE,
> +      {
> +        END_DEVICE_PATH_LENGTH,
> +        0
> +      }
> +    }
> +  }
> +};
> +
> +GLOBAL_REMOVE_IF_UNREFERENCED
> +CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
> +  L"Mem", L"I/O", L"Bus"
> +};
> +
> +STATIC PCI_ROOT_BRIDGE mPciRootBridges[] = {
> +  {
> +    0,                                      // Segment
> +    0,                                      // Supports
> +    0,                                      // Attributes
> +    TRUE,                                   // DmaAbove4G
> +    FALSE,                                  // NoExtendedConfigSpace
> +    FALSE,                                  // ResourceAssigned
> +    EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM |
> +    EFI_PCI_HOST_BRIDGE_MEM64_DECODE,       // AllocationAttributes
> +    { SYNQUACER_PCI_SEG0_BUSNUM_MIN,
> +      SYNQUACER_PCI_SEG0_BUSNUM_MAX },      // Bus
> +    { SYNQUACER_PCI_SEG0_PORTIO_MIN,
> +      SYNQUACER_PCI_SEG0_PORTIO_MAX },      // Io
> +    { SYNQUACER_PCI_SEG0_MMIO32_MIN,
> +      SYNQUACER_PCI_SEG0_MMIO32_MAX },      // Mem
> +    { SYNQUACER_PCI_SEG0_MMIO64_MIN,
> +      SYNQUACER_PCI_SEG0_MMIO64_MAX },      // MemAbove4G
> +    { MAX_UINT64, 0x0 },                    // PMem
> +    { MAX_UINT64, 0x0 },                    // PMemAbove4G
> +    (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[0]
> +  }, {
> +    1,                                      // Segment
> +    0,                                      // Supports
> +    0,                                      // Attributes
> +    TRUE,                                   // DmaAbove4G
> +    FALSE,                                  // NoExtendedConfigSpace
> +    FALSE,                                  // ResourceAssigned
> +    EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM |
> +    EFI_PCI_HOST_BRIDGE_MEM64_DECODE,       // AllocationAttributes
> +    { SYNQUACER_PCI_SEG1_BUSNUM_MIN,
> +      SYNQUACER_PCI_SEG1_BUSNUM_MAX },      // Bus
> +    { SYNQUACER_PCI_SEG1_PORTIO_MIN,
> +      SYNQUACER_PCI_SEG1_PORTIO_MAX },      // Io
> +    { SYNQUACER_PCI_SEG1_MMIO32_MIN,
> +      SYNQUACER_PCI_SEG1_MMIO32_MAX },      // Mem
> +    { SYNQUACER_PCI_SEG1_MMIO64_MIN,
> +      SYNQUACER_PCI_SEG1_MMIO64_MAX },      // MemAbove4G
> +    { MAX_UINT64, 0x0 },                    // PMem
> +    { MAX_UINT64, 0x0 },                    // PMemAbove4G
> +    (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[1]
> +  }
> +};
> +
> +/**
> +  Return all the root bridge instances in an array.
> +
> +  @param Count  Return the count of root bridge instances.
> +
> +  @return All the root bridge instances in an array.
> +          The array should be passed into PciHostBridgeFreeRootBridges()
> +          when it's not used.
> +**/
> +PCI_ROOT_BRIDGE *
> +EFIAPI
> +PciHostBridgeGetRootBridges (
> +  OUT UINTN     *Count
> +  )
> +{
> +  *Count = ARRAY_SIZE (mPciRootBridges);
> +
> +  return mPciRootBridges;
> +}
> +
> +/**
> +  Free the root bridge instances array returned from PciHostBridgeGetRootBridges().
> +
> +  @param Bridges The root bridge instances array.
> +  @param Count   The count of the array.
> +**/
> +VOID
> +EFIAPI
> +PciHostBridgeFreeRootBridges (
> +  PCI_ROOT_BRIDGE *Bridges,
> +  UINTN           Count
> +  )
> +{
> +}
> +
> +/**
> +  Inform the platform that the resource conflict happens.
> +
> +  @param HostBridgeHandle Handle of the Host Bridge.
> +  @param Configuration    Pointer to PCI I/O and PCI memory resource
> +                          descriptors. The Configuration contains the resources
> +                          for all the root bridges. The resource for each root
> +                          bridge is terminated with END descriptor and an
> +                          additional END is appended indicating the end of the
> +                          entire resources. The resource descriptor field
> +                          values follow the description in
> +                          EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
> +                          .SubmitResources().
> +**/
> +VOID
> +EFIAPI
> +PciHostBridgeResourceConflict (
> +  EFI_HANDLE                        HostBridgeHandle,
> +  VOID                              *Configuration
> +  )
> +{
> +  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
> +  UINTN                             RootBridgeIndex;
> +  DEBUG ((DEBUG_ERROR, "PciHostBridge: Resource conflict happens!\n"));
> +
> +  RootBridgeIndex = 0;
> +  Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
> +  while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
> +    DEBUG ((DEBUG_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
> +    for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
> +      ASSERT (Descriptor->ResType <
> +              ARRAY_SIZE (mPciHostBridgeLibAcpiAddressSpaceTypeStr));
> +      DEBUG ((DEBUG_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
> +              mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
> +              Descriptor->AddrLen, Descriptor->AddrRangeMax
> +              ));
> +      if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
> +        DEBUG ((DEBUG_ERROR, "     Granularity/SpecificFlag = %ld / %02x%s\n",
> +                Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
> +                ((Descriptor->SpecificFlag &
> +                  EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
> +                  ) != 0) ? L" (Prefetchable)" : L""
> +                ));
> +      }
> +    }
> +    //
> +    // Skip the END descriptor for root bridge
> +    //
> +    ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
> +    Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
> +                   (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
> +                   );
> +  }
> +}
> diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf
> new file mode 100644
> index 000000000000..fca62b2577da
> --- /dev/null
> +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf
> @@ -0,0 +1,50 @@
> +## @file
> +#  PCI Host Bridge Library instance for Socionext SynQuacer ARM SOC
> +#
> +#  Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
> +#
> +#  This program and the accompanying materials are licensed and made available
> +#  under the terms and conditions of the BSD License which accompanies this
> +#  distribution. The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> +#  IMPLIED.
> +#
> +#
> +##
> +
> +[Defines]
> +  INF_VERSION                    = 0x00010019
> +  BASE_NAME                      = SynQuacerPciHostBridgeLib
> +  FILE_GUID                      = fdc92446-65bc-4f86-b4a0-014a2119a732
> +  MODULE_TYPE                    = DXE_DRIVER
> +  VERSION_STRING                 = 1.0
> +  LIBRARY_CLASS                  = PciHostBridgeLib|DXE_DRIVER
> +  CONSTRUCTOR                    = SynQuacerPciHostBridgeLibConstructor
> +
> +#
> +# The following information is for reference only and not required by the build
> +# tools.
> +#
> +#  VALID_ARCHITECTURES           = AARCH64

So, this is still marked as AARCH64-only, even though the platform is
marked |ARM?

/
    Leif