From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::242; helo=mail-wm0-x242.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x242.google.com (mail-wm0-x242.google.com [IPv6:2a00:1450:400c:c09::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DB9C220945BC4 for ; Thu, 26 Oct 2017 14:24:09 -0700 (PDT) Received: by mail-wm0-x242.google.com with SMTP id b189so81190wmd.4 for ; Thu, 26 Oct 2017 14:27:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=15jRwR75yV4w6yD0sbLpbYo1actxmTISdYJC64ndt3M=; b=jLDF5EOEarkuUUxBq2burAQJub4R4La8cRX/KTXFb08YtYwYXLEok/QrWdmZK60pw0 X5XHDMXlFkCRbKG8OwwmBuc5s2cuWmpLxlVjLNvlkz0BFO1X/H0Zw6yiyyPH4ulxnXUA ST0gL+RgBxNrAGNpjw/CGD/xwCaojRkJav8FI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=15jRwR75yV4w6yD0sbLpbYo1actxmTISdYJC64ndt3M=; b=bzAKaqvn4t0pKa7FSV3v87DSRFEP4rDU2qbe0DGV+jrquPe7QoBfjnu/ibK0/+lsJp Ep0sgGYnYrFbPAnTTRliDfy2GRDbes+IFfS3MFyTFrOJsekAW307AlpeXXqBKLSJxU98 PeIX8T0rk1NH4zlDnBbouHlJeagYQTv95tJ5E67vnL99osbrnvGNHF8JPGFSgtYHIYHX ybh79s5apG0Jgewsm/IJ5ImGGGVzaBb1QmDowfxVEEGcVyHt0o+WLk1tpPp2+sFVbHf4 sIGitZvUFhRshb/qBFz7lOdMCq6qUYHpPvRCDDxW7KSNuv4KayK6LRTH4j1Cycf2bhIy DVkw== X-Gm-Message-State: AMCzsaVtd+lNcWGI2FMzHuU8RzPqMRR6SCu/uSn7S2GjrsABq/F617SX Vw3ZELC7eBiZcCNDIj0LxlPYIg== X-Google-Smtp-Source: ABhQp+QnekfyqKa9slOGmK3yr4R6sNfHzQmZFIr/7SQqig+hYahVQ79kqS3q53OGylcCiCK2ugfTmQ== X-Received: by 10.28.235.18 with SMTP id j18mr208229wmh.50.1509053274924; Thu, 26 Oct 2017 14:27:54 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id r3sm191552wmb.5.2017.10.26.14.27.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Oct 2017 14:27:53 -0700 (PDT) Date: Thu, 26 Oct 2017 22:27:52 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, daniel.thompson@linaro.org, masami.hiramatsu@linaro.org Message-ID: <20171026212752.2ujj4l4w6oft7gx5@bivouac.eciton.net> References: <20171025175947.22798-1-ard.biesheuvel@linaro.org> <20171025175947.22798-17-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20171025175947.22798-17-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v2 16/23] SynQuacer/SynQuacerMemoryInitPeiLib: add capsule support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Oct 2017 21:24:10 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Oct 25, 2017 at 06:59:40PM +0100, Ard Biesheuvel wrote: > Add support for dealing with capsules left in memory by the OS before > reboot. This needs to be done early, before the memory is reused, which > is why the initial handling must reside here. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c | 59 +++++++++++++++++++- > Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf | 12 ++++ > 2 files changed, 70 insertions(+), 1 deletion(-) > > diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c > index 9359f7c320b7..a249210a3192 100644 > --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c > +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c > @@ -17,12 +17,17 @@ > > #include > #include > +#include > #include > #include > +#include > +#include > > #include > #include > > +#include > + > #define ARM_MEMORY_REGION(Base, Size) \ > { (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK } > > @@ -39,7 +44,8 @@ BuildMemoryTypeInformationHob ( > > STATIC ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] = { > // Memory mapped SPI NOR flash > - ARM_UNCACHED_REGION (SYNQUACER_SPI_NOR_BASE, SYNQUACER_SPI_NOR_BASE), > + ARM_UNCACHED_REGION (FixedPcdGet64 (PcdFdBaseAddress), > + FixedPcdGet32 (PcdFdSize)), > > // DDR - 2 GB > ARM_MEMORY_REGION (SYNQUACER_SYSTEM_MEMORY_1_BASE, > @@ -113,6 +119,12 @@ MemoryPeim ( > { > EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; > RETURN_STATUS Status; > + EFI_PEI_SERVICES **PeiServices; > + PEI_CAPSULE_PPI *Capsule; > + VOID *CapsuleBuffer; > + UINTN CapsuleBufferLength; > + EFI_STATUS EfiStatus; > + BOOLEAN HaveCapsule; > > ResourceAttributes = > EFI_RESOURCE_ATTRIBUTE_PRESENT | > @@ -140,12 +152,57 @@ MemoryPeim ( > // SYNQUACER_SYSTEM_MEMORY_3_BASE, > // SYNQUACER_SYSTEM_MEMORY_3_SZ); > > + PeiServices = (EFI_PEI_SERVICES **) GetPeiServicesTablePointer (); > + ASSERT (PeiServices != NULL); > + > + EfiStatus = PeiServicesLocatePpi (&gPeiCapsulePpiGuid, 0, NULL, > + (VOID **)&Capsule); > + ASSERT_EFI_ERROR (EfiStatus); > + > + // > + // Check for persistent capsules > + // > + HaveCapsule = FALSE; > + EfiStatus = Capsule->CheckCapsuleUpdate (PeiServices); > + if (!EFI_ERROR (EfiStatus)) { > + > + // > + // Coalesce the capsule into unused memory. CreateState() below will copy > + // it to a properly allocated buffer. > + // > + CapsuleBuffer = (VOID *)FixedPcdGet64 (PcdSystemMemoryBase); > + CapsuleBufferLength = UefiMemoryBase - FixedPcdGet64 (PcdSystemMemoryBase); > + > + PeiServicesSetBootMode (BOOT_ON_FLASH_UPDATE); > + > + EfiStatus = Capsule->Coalesce (PeiServices, &CapsuleBuffer, > + &CapsuleBufferLength); > + if (!EFI_ERROR (EfiStatus)) { > + DEBUG ((DEBUG_INFO, "%a: Coalesced capsule @ %p (0x%lx)\n", > + __FUNCTION__, CapsuleBuffer, CapsuleBufferLength)); > + HaveCapsule = TRUE; > + } else { > + DEBUG ((DEBUG_WARN, "%a: failed to coalesce() capsule (Status == %r)\n", > + __FUNCTION__, EfiStatus)); > + } > + } > + > Status = ArmConfigureMmu (mVirtualMemoryTable, NULL, NULL); > ASSERT_EFI_ERROR (Status); > if (EFI_ERROR (Status)) { > return Status; > } > > + if (HaveCapsule) { > + EfiStatus = Capsule->CreateState (PeiServices, CapsuleBuffer, > + CapsuleBufferLength); > + > + if (EFI_ERROR (EfiStatus)) { > + DEBUG ((DEBUG_WARN, "%a: Capsule->CreateState failed (Status == %r)\n", > + __FUNCTION__, EfiStatus)); > + } > + } > + > if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) { > // Optional feature that helps prevent EFI memory map fragmentation. > BuildMemoryTypeInformationHob (); > diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf > index 1ddaee8a9d45..d294c943d7f9 100644 > --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf > +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf > @@ -36,14 +36,20 @@ [Packages] > [LibraryClasses] > ArmLib > ArmMmuLib > + CacheMaintenanceLib > DebugLib > + PeiServicesLib > + PeiServicesTablePointerLib > > [FeaturePcd] > gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob > > [FixedPcd] > + gArmTokenSpaceGuid.PcdFdBaseAddress > + gArmTokenSpaceGuid.PcdFdSize > gArmTokenSpaceGuid.PcdGicDistributorBase > gArmTokenSpaceGuid.PcdGicRedistributorsBase > + gArmTokenSpaceGuid.PcdSystemMemoryBase > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase > @@ -53,3 +59,9 @@ [FixedPcd] > gNetsecDxeTokenSpaceGuid.PcdEepRomBase > gFip006DxeTokenSpaceGuid.PcdFip006DxeRegBaseAddress > gFip006DxeTokenSpaceGuid.PcdFip006DxeMemBaseAddress > + > +[Ppis] > + gPeiCapsulePpiGuid > + > +[Depex] > + gPeiCapsulePpiGuid > -- > 2.11.0 >