From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: edk2-devel@lists.01.org, leif.lindholm@linaro.org
Cc: graeme.gregory@linaro.org, daniel.thompson@linaro.org,
masami.hiramatsu@linaro.org, methavanitpong.pipat@socionext.com,
Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH edk2-platforms v3 10/27] Platform/SynQuacerEvalBoard: add PCI support
Date: Tue, 31 Oct 2017 10:52:01 +0000 [thread overview]
Message-ID: <20171031105218.30208-11-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <20171031105218.30208-1-ard.biesheuvel@linaro.org>
Wire up the various drivers and libraries for the SynQuacerEvalBoard
platform. Also enable the usual PCI suspects: XHCI, SATA and NVME,
and the various bus, partition and file system drivers that we need
to make use of PCIe devices.
Given how PCI support enables USB support too, and taking the lack of
a RNG on this SoC into account, let's enable the ChaosKey driver as
well.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 52 ++++++++++++++++++++
Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf | 41 +++++++++++++++
2 files changed, 93 insertions(+)
diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
index 3dc8aa7461d6..519a078e15dc 100644
--- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
+++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
@@ -100,6 +100,7 @@ [LibraryClasses.common]
DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
+ UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
# BDS Libraries
UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
@@ -151,6 +152,12 @@ [LibraryClasses.common.DXE_DRIVER]
SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ #
+ # PCI
+ #
+ PciSegmentLib|Silicon/Socionext/SynQuacer/Library/SynQuacerPciSegmentLib/SynQuacerPciSegmentLib.inf
+ PciHostBridgeLib|Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf
+
[LibraryClasses.common.UEFI_APPLICATION]
PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
@@ -193,6 +200,7 @@ [PcdsFixedAtBuild.common]
gSynQuacerTokenSpaceGuid.PcdDramInfoBase|0x2E00FFC0
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|24
# 12x 2-core processor clusters
gArmPlatformTokenSpaceGuid.PcdCoreCount|2
@@ -430,3 +438,47 @@ [Components.common]
NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
}
+
+ #
+ # PCI
+ #
+ Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.inf
+ MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8010004F
+ }
+ MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+ MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+ MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
+
+ #
+ # AHCI Support
+ #
+ MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
+ MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+ MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+ MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+ MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+
+ #
+ # USB
+ #
+ MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
+ MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
+ MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+ MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+ MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+ MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+
+ #
+ # FAT filesystem + GPT/MBR partitioning
+ #
+ MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+ FatPkg/EnhancedFatDxe/Fat.inf
+
+ #
+ # RNG
+ #
+ Silicon/Openmoko/ChaosKeyDxe/ChaosKeyDxe.inf
diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
index f74e22c31aa5..838963eff612 100644
--- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
+++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
@@ -132,6 +132,47 @@ [FV.FvMain]
INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
INF MdeModulePkg/Application/UiApp/UiApp.inf
+ #
+ # PCI
+ #
+ INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.inf
+ INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
+ INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+ INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+ INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
+
+ #
+ # AHCI Support
+ #
+ INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
+ INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+ INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+ INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+ INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+
+ #
+ # USB
+ #
+ INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
+ INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
+ INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+ INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+ INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+ INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+
+ #
+ # FAT filesystem + GPT/MBR partitioning
+ #
+ INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+ INF FatPkg/EnhancedFatDxe/Fat.inf
+
+ #
+ # RNG
+ #
+ INF Silicon/Openmoko/ChaosKeyDxe/ChaosKeyDxe.inf
+
[FV.FVMAIN_PEI]
FvAlignment = 16
ERASE_POLARITY = 1
--
2.11.0
next prev parent reply other threads:[~2017-10-31 10:49 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-31 10:51 [PATCH edk2-platforms v3 00/27] add support for Socionext Synquacer Ard Biesheuvel
2017-10-31 10:51 ` [PATCH edk2-platforms v3 01/27] Silicon/SynQuacer: add package with platform headers Ard Biesheuvel
2017-10-31 10:51 ` [PATCH edk2-platforms v3 02/27] Silicon/Socionext: add driver for NETSEC network controller Ard Biesheuvel
2017-11-01 4:41 ` Leif Lindholm
2017-10-31 10:51 ` [PATCH edk2-platforms v3 03/27] Silicon/Socionext: add PlatformPeilib implementation for SynQuacer Ard Biesheuvel
2017-11-01 4:44 ` Leif Lindholm
2017-10-31 10:51 ` [PATCH edk2-platforms v3 04/27] Silicon/SynQuacer: implement a platform DXE driver Ard Biesheuvel
2017-11-01 4:46 ` Leif Lindholm
2017-10-31 10:51 ` [PATCH edk2-platforms v3 05/27] Silicon/SynQuacer: add MemoryInitPeiLib implementation Ard Biesheuvel
2017-11-01 4:49 ` Leif Lindholm
2017-10-31 10:51 ` [PATCH edk2-platforms v3 06/27] Platform: add support for Socionext SynQuacer eval board Ard Biesheuvel
2017-11-01 4:53 ` Leif Lindholm
2017-10-31 10:51 ` [PATCH edk2-platforms v3 07/27] Silicon/SynQuacer: implement PciSegmentLib to support dual RCs Ard Biesheuvel
2017-10-31 10:51 ` [PATCH edk2-platforms v3 08/27] Silicon/SynQuacer: implement PciHostBridgeLib support Ard Biesheuvel
2017-11-01 4:57 ` Leif Lindholm
2017-10-31 10:52 ` [PATCH edk2-platforms v3 09/27] Silicon/SynQuacer: implement EFI_CPU_IO2_PROTOCOL Ard Biesheuvel
2017-10-31 10:52 ` Ard Biesheuvel [this message]
2017-11-01 4:59 ` [PATCH edk2-platforms v3 10/27] Platform/SynQuacerEvalBoard: add PCI support Leif Lindholm
2017-10-31 10:52 ` [PATCH edk2-platforms v3 11/27] Platform/SynQuacerEvalBoard: add NETSEC driver Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 12/27] Silicon/SynQuacer: add ACPI support Ard Biesheuvel
2017-11-01 10:15 ` graeme.gregory
2017-11-01 16:36 ` Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 13/27] Silicon/SynQuacer: add device tree support for eval board Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 14/27] Silicon/SynQuacer: add NorFlashPlatformLib implementation Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 15/27] Silicon/Socionext: add driver for SPI NOR flash Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 16/27] Platform/SynQuacer: incorporate NOR flash and variable drivers Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 17/27] Silicon/SynQuacer: implement PlatformFlashAccessLib Ard Biesheuvel
2017-11-01 5:06 ` Leif Lindholm
2017-10-31 10:52 ` [PATCH edk2-platforms v3 18/27] SynQuacer/SynQuacerMemoryInitPeiLib: add capsule support Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 19/27] Socionext/SynQuacerEvalBoard: wire up basic " Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 20/27] Socionext/SynQuacerEvalBoard: switch to execute in place Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 21/27] Platform/SynQuacerEvalBoard: add signed capsule update support Ard Biesheuvel
2017-11-01 5:10 ` Leif Lindholm
2017-10-31 10:52 ` [PATCH edk2-platforms v3 22/27] Silicon/SynQuacer/AcpiTables: hide PCI domain #0 Ard Biesheuvel
2017-11-01 5:12 ` Leif Lindholm
2017-10-31 10:52 ` [PATCH edk2-platforms v3 23/27] Silicon/SynQuacerPciHostBridgeLib: add workaround to support 32-bit only cards Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 24/27] Platform/Socionext: add support for Socionext Developer Box rev 0.1 Ard Biesheuvel
2017-11-01 5:18 ` Leif Lindholm
2017-11-01 8:31 ` Ard Biesheuvel
2017-11-01 10:01 ` Leif Lindholm
2017-11-01 14:34 ` Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 25/27] Platform/DeveloperBox: add ConsolePrefDxe driver Ard Biesheuvel
2017-10-31 10:52 ` [PATCH edk2-platforms v3 26/27] Silicon/SynQuacer: add description of GPIO block to device tree Ard Biesheuvel
2017-11-01 5:20 ` Leif Lindholm
2017-10-31 10:52 ` [PATCH edk2-platforms v3 27/27] Silicon/SynQuacer: add description of EXIU to the " Ard Biesheuvel
2017-11-01 5:21 ` Leif Lindholm
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171031105218.30208-11-ard.biesheuvel@linaro.org \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox