From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::244; helo=mail-wr0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x244.google.com (mail-wr0-x244.google.com [IPv6:2a00:1450:400c:c0c::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5451A2035D0FF for ; Tue, 31 Oct 2017 03:49:47 -0700 (PDT) Received: by mail-wr0-x244.google.com with SMTP id r79so15464754wrb.13 for ; Tue, 31 Oct 2017 03:53:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=N6Lq3HArT0eePzP20fifLQ+226FRBz0hIQQo7e6wFb4=; b=cRnrDfsfzZxEiszp3tMHX/cG05S9Fh0v8lM+GCHUOWbFCntIutAsTGTpqEu4QsFSES iVvKvxa6ijBBBcMCpypiWbJ11taz8xpCuC4hsYMLbGC42LBpk+UlZTlKaRuxiAhqgBWW B9rJHQ8IzArN0J0mOxMLjUGSfYy+yP173F02Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=N6Lq3HArT0eePzP20fifLQ+226FRBz0hIQQo7e6wFb4=; b=rA53mkZO71vrdcpRvWe2RhBkqp0jXPCBeRQPc7YTb4UVJl/z/Xp9uF8Bif3KxaOX4g /Wq93lCGBKqrfjEMtJMBs6S8XfoHHRLKYbGW4f/VgaF6yuG8GZmDx54gFr43qAeTj8AS g66dXK80A3Ow99/m75y4uhUAP8TGF3WJWUbLUKIg/GfN4bNcdCT2ujtC27RkAeaWBDXf 86nCLQltK0+23cg25/A/Y51RQ9XqVXJHjMOu/2lmokctIW+JC2uK+8LXByVHLCcJ0Gte xbo+dFcU2kyxyyX57kEAB4muwrYjvxXRttLcqNBybArq7n3NbUBYZjlZ5WrfCAYHfhSV A0gA== X-Gm-Message-State: AMCzsaXhKNEe8RansmWKOnZWu4lAHRcTMWNZpFGaLWXjVUu3e2Dh8h/L TLFNwuFn1e9htsAMokK02RGPxkz6tHM= X-Google-Smtp-Source: ABhQp+SrqbFL0fi7p++DQSWf5va+/5DMb+ewwEtRbzlSFyEbQyUuJufs65iZ3cymJsvZ9P/HWzPpLw== X-Received: by 10.223.170.139 with SMTP id h11mr1477678wrc.167.1509447217520; Tue, 31 Oct 2017 03:53:37 -0700 (PDT) Received: from localhost.localdomain ([105.129.222.2]) by smtp.gmail.com with ESMTPSA id o14sm460985wra.54.2017.10.31.03.53.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 31 Oct 2017 03:53:36 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Cc: graeme.gregory@linaro.org, daniel.thompson@linaro.org, masami.hiramatsu@linaro.org, methavanitpong.pipat@socionext.com, Ard Biesheuvel Date: Tue, 31 Oct 2017 10:52:18 +0000 Message-Id: <20171031105218.30208-28-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171031105218.30208-1-ard.biesheuvel@linaro.org> References: <20171031105218.30208-1-ard.biesheuvel@linaro.org> Subject: [PATCH edk2-platforms v3 27/27] Silicon/SynQuacer: add description of EXIU to the device tree X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 31 Oct 2017 10:49:47 -0000 Add a DT node for the external interrupt unit (EXIU), which handles interrupts from GPIO lines. We need OS support for this for things like PHY interrupts and a 'wake' button. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 0746b7853ebf..a19f88d10511 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -523,4 +523,13 @@ clocks = <&clk_apb>; base = <0>; }; + + exiu: exiu@510c0000 { + compatible = "socionext,sc2a11-exiu"; + reg = <0x0 0x510c0000 0x0 0x20>; + interrupt-controller; + interrupt-parent = <&gic>; + #interrupt-cells = <3>; + spi-base = <112>; + }; }; -- 2.11.0