From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::243; helo=mail-wm0-x243.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id ABB522034A7A5 for ; Tue, 31 Oct 2017 20:46:54 -0700 (PDT) Received: by mail-wm0-x243.google.com with SMTP id r196so2430587wmf.2 for ; Tue, 31 Oct 2017 20:50:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=0uoCCPEXUB2zfiINE1E7U0mk23Mp/CixNBXdp2Z77CY=; b=Pdn+QeNDFOJcUzhi82DTw+GqPANUr4L0sTCn8J+wBrlME27SWlTW8MHVXTyYwlhMex TYMDVKRwBAOLk+zm6wP4aucx/fYGZLrhlkp1iH2vakbKVdw5NVfT23xw7Jd854SSTeCL Ga9JXeNdplPAQWxzDajaAYaF3EvZ6gruSg9l4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=0uoCCPEXUB2zfiINE1E7U0mk23Mp/CixNBXdp2Z77CY=; b=XD3OvfvWw3mZo5Hb5c6cLLImR5ilBFoJ6wyASgWyvGRnJdXImNDgem3PuDdcVXsnbO oFokBNV2DOBLECgfswFcda402yAxZrzdJxtzW709Qvj4FWVqVEIrrUcx+rzLEZEuVv3u bwq2uUumHJDsaqnOAQCR5Ymol68PWL2Q8ILzSNNCD4zvxjc4sMPxru9wThrJqblM4VGG ooxuG2pZVnyFDCtIVdfASl66QNkLTr1CVT6YjGH7NS1rOxzK2rFr1GZ/h6PWPrlcgyPS pSkvKd1RuUnrkjgplD1LyWYwj0arwxuca/OC/VapVIovYjHiLJSGELbt3cXPdqO6HCX2 m3fQ== X-Gm-Message-State: AMCzsaWJQE5V3HZrci576CO78QUf/YefMZosUaRnAb+dq22ovkCl5bOQ ugl4BqBIluoLK8yFzffvLECTOg== X-Google-Smtp-Source: ABhQp+R8D+oKwuSpZnDZqUL3IRGRltzzmUhh1xdsI3OiaL4ELFH95WSsfJrV+cYfJpjytwXzqVduLA== X-Received: by 10.28.187.10 with SMTP id l10mr3753251wmf.128.1509508245712; Tue, 31 Oct 2017 20:50:45 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id 195sm8086474wmj.3.2017.10.31.20.50.44 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 31 Oct 2017 20:50:44 -0700 (PDT) Date: Wed, 1 Nov 2017 03:50:43 +0000 From: Leif Lindholm To: Marcin Wojtas Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, jsd@semihalf.com Message-ID: <20171101035043.grt6awwoawl5b4mk@bivouac.eciton.net> References: <1509422375-20198-1-git-send-email-mw@semihalf.com> <1509422375-20198-6-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1509422375-20198-6-git-send-email-mw@semihalf.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [platforms: PATCH 5/6] Marvell/Drivers: MvSpiFlash: Fix bank selection for Spansion X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Nov 2017 03:46:54 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Oct 31, 2017 at 04:59:34AM +0100, Marcin Wojtas wrote: > Spansion SPI flash devices use different command for bank > selection. Update it, basing on the first byte of flash ID. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas > --- > Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c | 5 +++++ > Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h | 4 ++++ > 2 files changed, 9 insertions(+) > > diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c > index 703994c..a00fc305 100755 > --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c > +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c > @@ -150,6 +150,11 @@ SpiFlashCmdBankaddrWrite ( > { > UINT8 Cmd = CMD_BANK_WRITE; > > + /* Update bank selection command for Spansion */ > + if (Slave->Info->Id[0] == SPI_FLASH_MFR_SPANSION) { > + Cmd = CMD_BANKADDR_BRWR; > + } > + > MvSpiFlashWriteCommon (Slave, &Cmd, 1, &BankSel, 1); > } > > diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h > index 2583484..00af188 100755 > --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h > +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h > @@ -57,6 +57,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > #define CMD_READ_ARRAY_FAST 0x0b > #define CMD_PAGE_PROGRAM 0x02 > #define CMD_BANK_WRITE 0xc5 > +#define CMD_BANKADDR_BRWR 0x17 > #define CMD_ERASE_4K 0x20 > #define CMD_ERASE_32K 0x52 > #define CMD_ERASE_64K 0xd8 > @@ -72,6 +73,9 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > > #define SPI_FLASH_16MB_BOUN 0x1000000 > > +/* Manufacturer ID's */ > +#define SPI_FLASH_MFR_SPANSION 0x01 > + Please move this definition to NorFlashInfoLib. Otherwise this patch looks OK. / Leif > typedef enum { > SPI_FLASH_READ_ID, > SPI_FLASH_READ, // Read from SPI flash with address > -- > 2.7.4 >