From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::242; helo=mail-wm0-x242.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x242.google.com (mail-wm0-x242.google.com [IPv6:2a00:1450:400c:c09::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EC2272034AB19 for ; Tue, 31 Oct 2017 21:40:21 -0700 (PDT) Received: by mail-wm0-x242.google.com with SMTP id y80so2576884wmd.0 for ; Tue, 31 Oct 2017 21:44:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=suYpWVMWzqT3uujWgawazTKZkKAcWrIv8vVfBy/dfyQ=; b=FJScIi2zO4bp1N+EPVKuRwR7b9tFa9IHFkIl8+VM44aNhs1Xh8S+gybGvqZGBfxVq3 sWINpbxeMWrDwX+ixxktsAp1LBsv5olsRz+ljquNC4kgeGIdZ2MkDy/1SF1u/HQBvyHd dKA1pKGSNT5t2twpb6h0vzj7wCDIR+TLpDJZM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=suYpWVMWzqT3uujWgawazTKZkKAcWrIv8vVfBy/dfyQ=; b=M+z/km3I4+lZGgwW9SpesszYZ7LO6s4g80Pp8XWr0WI6RwnwRTMtJMrE9RwTjVCOlP fU2p4B42sbxByF21wBA4dGe0FSDi8u4Lr11yC7+/DUWn0hdZ13fNa36sUKn9QQsJT1w4 e4fRYXAsAAy5hKr1t1XkHguU3QzkG3ND+2txHpXCKyaEnLJn7uguwEpi6ftcFET8W382 TMGA9CfF97NYpNVCxnITphc6s9qNPtllIVLmp3OaWVCCC7cVnRyCMbQKG1CE25nkYOrO gsdgXxyCnJIcOe5wRvrxGpUoT41Wpfy8Z99sq0/SW5YxJFF5Y+zQP98+2xr5unLXKF9N fUvw== X-Gm-Message-State: AMCzsaXHwOy1hVrHcJ0Z/FBnqiKlwofRBVMPPBjWQ/FmOl/gGcFgHURM kLla457wJEmwb1lfepj678mV4w== X-Google-Smtp-Source: ABhQp+RtN88pl1DZOtiLpVZEniED9yHsK0lU4Rp/28+V+JbD/3gn3bAcZO3638JPa3x7ztXnxtJKTg== X-Received: by 10.28.187.10 with SMTP id l10mr3833762wmf.128.1509511452876; Tue, 31 Oct 2017 21:44:12 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id n129sm1231246wmn.33.2017.10.31.21.44.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 31 Oct 2017 21:44:11 -0700 (PDT) Date: Wed, 1 Nov 2017 04:44:10 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, graeme.gregory@linaro.org, daniel.thompson@linaro.org, masami.hiramatsu@linaro.org, methavanitpong.pipat@socionext.com Message-ID: <20171101044410.7s54ea3igyt7qez4@bivouac.eciton.net> References: <20171031105218.30208-1-ard.biesheuvel@linaro.org> <20171031105218.30208-4-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20171031105218.30208-4-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v3 03/27] Silicon/Socionext: add PlatformPeilib implementation for SynQuacer X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Nov 2017 04:40:22 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Oct 31, 2017 at 10:51:54AM +0000, Ard Biesheuvel wrote: > Create a specialized PlatformPeiLib implementation that invokes the > platform specific firmware interface (currently, just a data structure > left in SRAM) to set the ARM standard PcdSystemMemoryBase|Size PCDs, > and expose the information via a newly added DramInfo PPI. > > It is also in charge of copying the secondary compressed firmware > volume to DRAM before decompressing it. This works around a performance > issue regarding mapping the NOR flash with normal uncached attributes. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > Silicon/Socionext/SynQuacer/Include/Platform/DramInfo.h | 30 ++++ > Silicon/Socionext/SynQuacer/Include/Ppi/DramInfo.h | 64 ++++++++ > Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c | 161 ++++++++++++++++++++ > Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf | 53 +++++++ > Silicon/Socionext/SynQuacer/SynQuacer.dec | 12 ++ > 5 files changed, 320 insertions(+) > > diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/DramInfo.h b/Silicon/Socionext/SynQuacer/Include/Platform/DramInfo.h > new file mode 100644 > index 000000000000..f7691bdade4a > --- /dev/null > +++ b/Silicon/Socionext/SynQuacer/Include/Platform/DramInfo.h > @@ -0,0 +1,30 @@ > +/** @file > + Data structure for passing DRAM information from lower level firmware > + > + Copyright (c) 2017, Linaro Ltd. All rights reserved.
> + > + This program and the accompanying materials are licensed and made available > + under the terms and conditions of the BSD License which accompanies this > + distribution. The full text of the license may be found at > + http://opensource.org/licenses/bsd-license.php. > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT > + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > + > +**/ > + > +#ifndef _SYNQUACER_PLATFORM_DRAM_INFO_H_ > +#define _SYNQUACER_PLATFORM_DRAM_INFO_H_ > + > +typedef struct { > + UINT64 Base; > + UINT64 Size; > +} DRAM_INFO_ENTRY; > + > +typedef struct { > + UINT32 NumRegions; > + UINT32 Reserved; > + DRAM_INFO_ENTRY Entry[3]; > +} DRAM_INFO; > + > +#endif > diff --git a/Silicon/Socionext/SynQuacer/Include/Ppi/DramInfo.h b/Silicon/Socionext/SynQuacer/Include/Ppi/DramInfo.h > new file mode 100644 > index 000000000000..6453e121317d > --- /dev/null > +++ b/Silicon/Socionext/SynQuacer/Include/Ppi/DramInfo.h > @@ -0,0 +1,64 @@ > +/** @file > + DRAM info PPI to retrieve DRAM information from lower level firmware > + > + Copyright (c) 2017, Linaro Ltd. All rights reserved.
> + > + This program and the accompanying materials are licensed and made available > + under the terms and conditions of the BSD License which accompanies this > + distribution. The full text of the license may be found at > + http://opensource.org/licenses/bsd-license.php. > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT > + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > + > +**/ > + > +#ifndef _SYNQUACER_DRAMINFO_PPI_ > +#define _SYNQUACER_DRAMINFO_PPI_ > + > +#define SYNQUACER_DRAMINFO_PPI_GUID \ > + { 0x3e1d7356, 0xdda4, 0x4b1a, { 0x93, 0x46, 0xbf, 0x89, 0x1c, 0x86, 0x46, 0xcc } } > + > +/** > + Retrieve the number of discontiguous DRAM regions > + > + @param[out] RegionCount The number of available DRAM regions > + > + @retval EFI_SUCCESS The data was successfully returned. > + @retval EFI_INVALID_PARAMETER RegionCount == NULL > + > +**/ > +typedef > +EFI_STATUS > +(EFIAPI * DRAMINFO_GET_REGION_COUNT) ( > + OUT UINTN *RegionCount > + ); > + > +/** > + Retrieve the base and size of a DRAM region > + > + @param[in] RegionIndex The 0-based index of the region to retrieve > + @param[out] Base The base of the requested region > + @param[out] Size The size of the requested region > + > + @retval EFI_SUCCESS The data was successfully returned. > + @retval EFI_INVALID_PARAMETER Base == NULL or Size == NULL > + @retval EFI_NOT_FOUND No region exists with index >= RegionIndex > + > +**/ > +typedef > +EFI_STATUS > +(EFIAPI * DRAMINFO_GET_REGION) ( > + IN UINTN RegionIndex, > + OUT UINT64 *Base, > + OUT UINT64 *Size > + ); > + > +typedef struct { > + DRAMINFO_GET_REGION_COUNT GetRegionCount; > + DRAMINFO_GET_REGION GetRegion; > +} SYNQUACER_DRAM_INFO_PPI; > + > +extern EFI_GUID gSynQuacerDramInfoPpiGuid; > + > +#endif > diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c > new file mode 100644 > index 000000000000..d83f2ec524e5 > --- /dev/null > +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c > @@ -0,0 +1,161 @@ > +/** @file > +* > +* Copyright (c) 2011-2014, ARM Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +STATIC > +CONST DRAM_INFO *mDramInfo = (VOID *)(UINTN)FixedPcdGet64 (PcdDramInfoBase); > + > +/** > + Retrieve the number of discontiguous DRAM regions > + > + @param[out] RegionCount The number of available DRAM regions > + > + @retval EFI_SUCCESS The data was successfully returned. > + @retval EFI_INVALID_PARAMETER RegionCount == NULL > + > +**/ > +STATIC > +EFI_STATUS > +EFIAPI > +GetDramRegionCount ( > + OUT UINTN *RegionCount > + ) > +{ > + if (RegionCount == NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + *RegionCount = mDramInfo->NumRegions; > + > + return EFI_SUCCESS; > +} > + > +/** > + Retrieve the base and size of a DRAM region > + > + @param[in] RegionIndex The 0-based index of the region to retrieve > + @param[out] Base The base of the requested region > + @param[out] Size The size of the requested region > + > + @retval EFI_SUCCESS The data was successfully returned. > + @retval EFI_INVALID_PARAMETER Base == NULL or Size == NULL > + @retval EFI_NOT_FOUND No region exists with index >= RegionIndex > + > +**/ > +STATIC > +EFI_STATUS > +EFIAPI > +GetDramRegion ( > + IN UINTN RegionIndex, > + OUT UINT64 *Base, > + OUT UINT64 *Size > + ) > +{ > + if (Base == NULL || Size == NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + if (RegionIndex >= mDramInfo->NumRegions) { > + return EFI_NOT_FOUND; > + } > + > + *Base = mDramInfo->Entry[RegionIndex].Base; > + *Size = mDramInfo->Entry[RegionIndex].Size; > + > + return EFI_SUCCESS; > +} > + > +STATIC SYNQUACER_DRAM_INFO_PPI mDramInfoPpi = { > + GetDramRegionCount, > + GetDramRegion > +}; > + > +STATIC CONST EFI_PEI_PPI_DESCRIPTOR mDramInfoPpiDescriptor = { > + EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST, > + &gSynQuacerDramInfoPpiGuid, > + &mDramInfoPpi > +}; > + > +STATIC > +EFI_STATUS > +EFIAPI > +PeiMemoryDiscoveredNotify ( > + IN EFI_PEI_SERVICES **PeiServices, > + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc, > + IN VOID *Ppi > + ) > +{ > + EFI_FIRMWARE_VOLUME_HEADER *Fvh; > + VOID *Buf; > + > + Fvh = (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)FixedPcdGet64 (PcdSecondaryFvBase); > + > + Buf = AllocatePages (EFI_SIZE_TO_PAGES (Fvh->FvLength)); > + if (Buf == NULL) { > + return EFI_OUT_OF_RESOURCES; > + } > + > + DEBUG ((DEBUG_INFO, "%a: copying secondary FV to DRAM\n", __FUNCTION__)); > + CopyMem (Buf, Fvh, Fvh->FvLength); > + DEBUG ((DEBUG_INFO, "%a: copying done\n", __FUNCTION__)); > + > + PeiServicesInstallFvInfoPpi (NULL, Buf, Fvh->FvLength, NULL, NULL); > + > + return EFI_SUCCESS; > +} > + > +STATIC CONST EFI_PEI_NOTIFY_DESCRIPTOR mPeiMemoryDiscoveredNotifyDesc = { > + EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | > + EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST, > + &gEfiPeiMemoryDiscoveredPpiGuid, > + PeiMemoryDiscoveredNotify > +}; > + > +EFI_STATUS > +EFIAPI > +PlatformPeim ( > + VOID > + ) > +{ > + EFI_STATUS Status; > + > + ASSERT (mDramInfo->NumRegions > 0); > + > + // > + // Record the first region into PcdSystemMemoryBase and PcdSystemMemorySize. > + // This is the region we will use for UEFI itself. > + // > + Status = PcdSet64S (PcdSystemMemoryBase, mDramInfo->Entry[0].Base); > + ASSERT_EFI_ERROR (Status); > + > + Status = PcdSet64S (PcdSystemMemorySize, mDramInfo->Entry[0].Size); > + ASSERT_EFI_ERROR (Status); > + > + BuildFvHob (FixedPcdGet64 (PcdFvBaseAddress), FixedPcdGet32 (PcdFvSize)); > + > + Status = PeiServicesNotifyPpi (&mPeiMemoryDiscoveredNotifyDesc); > + ASSERT_EFI_ERROR (Status); > + > + return PeiServicesInstallPpi (&mDramInfoPpiDescriptor); > +} > diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf > new file mode 100644 > index 000000000000..9a3fcebee394 > --- /dev/null > +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf > @@ -0,0 +1,53 @@ > +#/** @file > +# > +# Copyright (c) 2017, Linaro, Ltd. All rights reserved. > +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of the BSD License > +# which accompanies this distribution. The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +# > +#**/ > + > +[Defines] > + INF_VERSION = 0x0001001A > + BASE_NAME = SynQuacerPlatformPeiLib > + FILE_GUID = 86537337-b62b-4dcd-846f-033a6a8355e0 > + MODULE_TYPE = BASE > + VERSION_STRING = 1.0 > + LIBRARY_CLASS = PlatformPeiLib > + > +[Sources] > + SynQuacerPlatformPeiLib.c > + > +[Packages] > + ArmPkg/ArmPkg.dec > + MdePkg/MdePkg.dec > + MdeModulePkg/MdeModulePkg.dec > + Silicon/Socionext/SynQuacer/SynQuacer.dec > + > +[LibraryClasses] > + BaseMemoryLib > + DebugLib > + HobLib > + MemoryAllocationLib > + PcdLib > + PeiServicesLib > + > +[FixedPcd] > + gArmTokenSpaceGuid.PcdFvBaseAddress > + gArmTokenSpaceGuid.PcdFvSize > + gSynQuacerTokenSpaceGuid.PcdDramInfoBase > + > +[Ppis] > + gEfiPeiMemoryDiscoveredPpiGuid ## CONSUMES > + gSynQuacerDramInfoPpiGuid ## PRODUCES > + > +[Pcd] > + gArmTokenSpaceGuid.PcdSystemMemoryBase > + gArmTokenSpaceGuid.PcdSystemMemorySize > + gSynQuacerTokenSpaceGuid.PcdSecondaryFvBase > + gSynQuacerTokenSpaceGuid.PcdSecondaryFvSize > diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec > index c3adf85d3562..446be69473fb 100644 > --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec > +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec > @@ -18,3 +18,15 @@ [Defines] > > [Includes] > Include > + > +[Guids] > + gSynQuacerTokenSpaceGuid = { 0x4d04555b, 0xdfdc, 0x418a, { 0x8a, 0xab, 0x07, 0xce, 0xef, 0x46, 0x82, 0xbb } } > + > +[Ppis] > + gSynQuacerDramInfoPpiGuid = { 0x3e1d7356, 0xdda4, 0x4b1a, { 0x93, 0x46, 0xbf, 0x89, 0x1c, 0x86, 0x46, 0xcc } } > + > +[PcdsFixedAtBuild] > + gSynQuacerTokenSpaceGuid.PcdDramInfoBase|0|UINT64|0x00000001 > + > + gSynQuacerTokenSpaceGuid.PcdSecondaryFvBase|0|UINT64|0x00000002 > + gSynQuacerTokenSpaceGuid.PcdSecondaryFvSize|0|UINT64|0x00000003 > -- > 2.11.0 >