From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.24; helo=mga09.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 012802034A896 for ; Thu, 2 Nov 2017 17:53:38 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Nov 2017 17:57:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,336,1505804400"; d="scan'208";a="1239046027" Received: from jwang36-mobl2.ccr.corp.intel.com ([10.239.192.100]) by fmsmga002.fm.intel.com with ESMTP; 02 Nov 2017 17:57:31 -0700 From: Jian J Wang To: edk2-devel@lists.01.org Cc: Eric Dong , Jiewen Yao , Laszlo Ersek Date: Fri, 3 Nov 2017 08:57:29 +0800 Message-Id: <20171103005729.7856-1-jian.j.wang@intel.com> X-Mailer: git-send-email 2.14.1.windows.1 Subject: [PATCH v2] UefiCpuPkg/CpuDxe: Fix multiple entries of RT_CODE in memory map X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 03 Nov 2017 00:53:39 -0000 > v2 > a. Fix an issue which will cause setting capability failure if size is smaller > than a page. More than one entry of RT_CODE memory might cause boot problem for some old OSs. This patch will fix this issue to keep OS compatibility as much as possible. More detailed information, please refer to https://bugzilla.tianocore.org/show_bug.cgi?id=753 Cc: Eric Dong Cc: Jiewen Yao Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- UefiCpuPkg/CpuDxe/CpuPageTable.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c index d312eb66f8..4a7827ebc9 100644 --- a/UefiCpuPkg/CpuDxe/CpuPageTable.c +++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c @@ -809,7 +809,9 @@ RefreshGcdMemoryAttributesFromPaging ( PageLength = 0; for (Index = 0; Index < NumberOfDescriptors; Index++) { - if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) { + if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent + || (MemorySpaceMap[Index].BaseAddress & EFI_PAGE_MASK) != 0 + || (MemorySpaceMap[Index].Length & EFI_PAGE_MASK) != 0) { continue; } @@ -829,6 +831,15 @@ RefreshGcdMemoryAttributesFromPaging ( // Sync real page attributes to GCD BaseAddress = MemorySpaceMap[Index].BaseAddress; MemorySpaceLength = MemorySpaceMap[Index].Length; + Capabilities = MemorySpaceMap[Index].Capabilities | + EFI_MEMORY_PAGETYPE_MASK; + Status = gDS->SetMemorySpaceCapabilities ( + BaseAddress, + MemorySpaceLength, + Capabilities + ); + ASSERT_EFI_ERROR (Status); + while (MemorySpaceLength > 0) { if (PageLength == 0) { PageEntry = GetPageTableEntry (&PagingContext, BaseAddress, &PageAttribute); @@ -846,7 +857,6 @@ RefreshGcdMemoryAttributesFromPaging ( if (Attributes != (MemorySpaceMap[Index].Attributes & EFI_MEMORY_PAGETYPE_MASK)) { DoUpdate = TRUE; Attributes |= (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_PAGETYPE_MASK); - Capabilities = Attributes | MemorySpaceMap[Index].Capabilities; } else { DoUpdate = FALSE; } @@ -854,8 +864,8 @@ RefreshGcdMemoryAttributesFromPaging ( Length = MIN (PageLength, MemorySpaceLength); if (DoUpdate) { - gDS->SetMemorySpaceCapabilities (BaseAddress, Length, Capabilities); - gDS->SetMemorySpaceAttributes (BaseAddress, Length, Attributes); + Status = gDS->SetMemorySpaceAttributes (BaseAddress, Length, Attributes); + ASSERT_EFI_ERROR (Status); DEBUG ((DEBUG_INFO, "Update memory space attribute: [%02d] %016lx - %016lx (%08lx -> %08lx)\r\n", Index, BaseAddress, BaseAddress + Length - 1, MemorySpaceMap[Index].Attributes, Attributes)); -- 2.14.1.windows.1