From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::244; helo=mail-wm0-x244.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 526232034EE0F for ; Sat, 4 Nov 2017 22:48:53 -0700 (PDT) Received: by mail-wm0-x244.google.com with SMTP id r68so5650841wmr.0 for ; Sat, 04 Nov 2017 22:52:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=75PsY3zBAeAodwXUraQHX8GKxiiuvV5ZZjJ4zpqje6U=; b=fllUoD6CgrOvP5Vg2MeGJl09SzoNkAxtvQu75JNBeaSUcuogASADOWsv2BI9nvcUkX LXwVP8f2/i3E7Y+wXgU5vO8AQyupvTI3DRjWelKFV/KjRSz2ZLWcX4a4f/2xaQY6FqLz 5Qk1+SB4Pi+fkbH68fG2o4ZcLZ+//et1SPrJo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=75PsY3zBAeAodwXUraQHX8GKxiiuvV5ZZjJ4zpqje6U=; b=MKs5gIXJyqW00Id4g+Yxb3ffcK31Ro5b+dknL54AzbvGQSYcqfuaZpMNTfDcWfKiMI rAjfluY6SGExmVWTbI0kPHoy0buJ+E80HiBejdb9gCjhPvPlr3+UjMsI4nYEiuCecqeD 1OeYpPmsgefp5W4mAQiSbL6c6VUrOaszrH+FMEMirpn5p9YDFP4mBdsPv2jfBdktb9x3 CzZeXJ7k3ss395cnTc2v6TdUSWdnt9TRXl2oF6OEIF8X6PJ5pCH9Z12m9/VAvXx8dq6B iswEOJGNiL/vCcKRz+YpCXESP4+fYMVPkXPLJr53nZh8agNkA8EogAm4bbl0/dHhs/Mn Mflg== X-Gm-Message-State: AJaThX5k/4KKPpW/joqSKraVfb+AD10BcHY4SLzM/n+ijw6N7LDE4X+P 6wqO5Nsi6HyhoKrEW0cUC3N2aQmK8hI= X-Google-Smtp-Source: ABhQp+TSXUZvy8tksNSlw8SYTYMmqxMsFc+kbAoAL5moiaDn481M2/NfUdGQvQucRuLNs/Qi6jELOA== X-Received: by 10.28.236.79 with SMTP id k76mr2578690wmh.95.1509861168715; Sat, 04 Nov 2017 22:52:48 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id k184sm1744350wmk.26.2017.11.04.22.52.47 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 04 Nov 2017 22:52:47 -0700 (PDT) Date: Sun, 5 Nov 2017 05:52:46 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, lersek@redhat.com, liming.gao@intel.com Message-ID: <20171105055245.xbicmlagfeu7xt2o@bivouac.eciton.net> References: <20171103113352.8604-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20171103113352.8604-1-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH v2] ArmPlatformPkg/PrePeiCore: seed temporary stack before entering PEI core X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Nov 2017 05:48:53 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Nov 03, 2017 at 11:33:52AM +0000, Ard Biesheuvel wrote: > DEBUG builds of PEI code will print a diagnostic message regarding > the utilization of temporary RAM before switching to permanent RAM. > For example, > > Total temporary memory: 16352 bytes. > temporary memory stack ever used: 4820 bytes. > temporary memory heap used for HobList: 4720 bytes. > > Tracking stack utilization like this requires the stack to be seeded > with a known magic value, and this needs to occur before entering C > code, given that it uses the stack. Currently, only Nt32Pkg appears > to implement this feature, but it is useful nonetheless, so let's > wire it up for PrePeiCore as well. > > Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=748 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel OK, this may sound completely unreasonable, but seeing those implementations overwrite callee-saved registers without saving them makes my brain unhappy. (Yes, I know.) Could they either: - Have a comment prepended establishing the implicit ABI of which registers the caller cannot rely on reusing after return. Preferably somewhat echoed at the call site. - Be rewritten to use only scratch registers? / Leif > --- > v2: switch to newly introduced PCD > > ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S | 6 ++++++ > ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S | 8 ++++++++ > ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm | 8 ++++++++ > ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf | 2 ++ > ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf | 2 ++ > 5 files changed, 26 insertions(+) > > diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S > index aab5edab0c42..0950fd0c0cdb 100644 > --- a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S > +++ b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S > @@ -84,4 +84,10 @@ _PrepareArguments: > > _SetupPrimaryCoreStack: > mov sp, x1 > + MOV64 (x8, FixedPcdGet64 (PcdCPUCoresStackBase)) > + MOV64 (x9, FixedPcdGet32 (PcdInitValueInTempStack) |\ > + FixedPcdGet32 (PcdInitValueInTempStack) << 32) > +0:stp x9, x9, [x8], #16 > + cmp x8, x1 > + b.lt 0b > b _PrepareArguments > diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S > index 14344425ad4c..a491af30a048 100644 > --- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S > +++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S > @@ -65,6 +65,14 @@ _PrepareArguments: > > _SetupPrimaryCoreStack: > mov sp, r1 > + MOV32 (r8, FixedPcdGet64 (PcdCPUCoresStackBase)) > + MOV32 (r9, FixedPcdGet32 (PcdInitValueInTempStack)) > + mov r10, r9 > + mov r11, r9 > + mov r12, r9 > +0:stm r8!, {r9-r12} > + cmp r8, r1 > + blt 0b > b _PrepareArguments > > _NeverReturn: > diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm > index abea675828df..dc1ad8144492 100644 > --- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm > +++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm > @@ -79,6 +79,14 @@ _PrepareArguments > > _SetupPrimaryCoreStack > mov sp, r1 > + mov32 r8, FixedPcdGet64 (PcdCPUCoresStackBase) > + mov32 r9, FixedPcdGet32 (PcdInitValueInTempStack) > + mov r10, r9 > + mov r11, r9 > + mov r12, r9 > +0:stm r8!, {r9-r12} > + cmp r8, r1 > + blt 0b > b _PrepareArguments > > _NeverReturn > diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf b/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf > index ecdbccb8d620..8e0456f8dc2a 100644 > --- a/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf > +++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf > @@ -75,3 +75,5 @@ [FixedPcd] > gArmTokenSpaceGuid.PcdGicDistributorBase > gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase > gArmTokenSpaceGuid.PcdGicSgiIntId > + > + gEfiMdeModulePkgTokenSpaceGuid.PcdInitValueInTempStack > diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf b/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf > index b5d4e389b2a4..ec83cec2d879 100644 > --- a/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf > +++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf > @@ -69,3 +69,5 @@ [FixedPcd] > gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase > gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize > gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize > + > + gEfiMdeModulePkgTokenSpaceGuid.PcdInitValueInTempStack > -- > 2.11.0 >