From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::235; helo=mail-wr0-x235.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x235.google.com (mail-wr0-x235.google.com [IPv6:2a00:1450:400c:c0c::235]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8246B21B00DCC for ; Wed, 8 Nov 2017 08:08:49 -0800 (PST) Received: by mail-wr0-x235.google.com with SMTP id 15so2908830wrb.5 for ; Wed, 08 Nov 2017 08:12:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=5lR79licgL4gHcO8r3AfUKvk5QiA3CSfk4w+21PEjKI=; b=LijmxPsc+/6Y3I0tRGt+SmHEKBxC6K7tSOK38IQBVUSbEpUAUQJgpsWulVY0HsXuuB jtOXJ+EMRkwU+xxnRD1fcU5SW55yxtsR+9ADLYAF8OfansafQjwt1pB8/ryG4DsYgaK3 OYGF55Wd6r/mvJn7r9kjAgncGV5Z00u8PqZXo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=5lR79licgL4gHcO8r3AfUKvk5QiA3CSfk4w+21PEjKI=; b=Ox2PRMUgtjnQXdBTmyGJP5MykR6MyBjAg9+njU7BWFEOOqAzkNI3CyPE3R1sCSGBVK N64cG2Htb1haxIjZjKuNy7Zz++BY7YdydM3WQSrDnFdoa6ZDdKFpnLFpdPvH1zt40PTl AN/SqaUiiz9Oa09LGILUPTsRpvKVs1Zyjc0+TO3caZIQtQvo9GCtx1UwNTHoThUSZy2T J3EU3af3a3jn+YhJ9HZW9krqfa+gUmE15hxaHteN2nHYiqRAOG8T+TF2ULT8fQNwQkT4 J+BiOwudDklnV+cLs76xyvZ5BbX7uURV0fLMJJU+Y2IRcoGDiRJ9sfwjQjzTpbCgy8eE vbRA== X-Gm-Message-State: AJaThX5YuzAnpj1r1InED35WhYjRfojCYSuCR96ToL+2eTidjW8B0zb8 mUtNLePr36RVuOaaYXbvZLrLSA== X-Google-Smtp-Source: ABhQp+SUdnGzC2QBOEAzUiuYgb13uExjq6PiqPjMLCXBUBEmtEdw44nNuG2tFkyvTAEQ/tSvM2XbyQ== X-Received: by 10.223.152.149 with SMTP id w21mr913680wrb.274.1510157568745; Wed, 08 Nov 2017 08:12:48 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id 61sm1901742wrg.58.2017.11.08.08.12.47 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 08 Nov 2017 08:12:47 -0800 (PST) Date: Wed, 8 Nov 2017 16:12:46 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: "edk2-devel@lists.01.org" , Laszlo Ersek , "Gao, Liming" Message-ID: <20171108161246.2c7ppy562fpizjcd@bivouac.eciton.net> References: <20171103113352.8604-1-ard.biesheuvel@linaro.org> <20171105055245.xbicmlagfeu7xt2o@bivouac.eciton.net> MIME-Version: 1.0 In-Reply-To: User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH v2] ArmPlatformPkg/PrePeiCore: seed temporary stack before entering PEI core X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Nov 2017 16:08:49 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Sun, Nov 05, 2017 at 04:29:15PM +0000, Ard Biesheuvel wrote: > >> OK, this may sound completely unreasonable, but seeing those > >> implementations overwrite callee-saved registers without saving them > >> makes my brain unhappy. (Yes, I know.) > >> > >> Could they either: > >> - Have a comment prepended establishing the implicit ABI of which > >> registers the caller cannot rely on reusing after return. > >> Preferably somewhat echoed at the call site. > >> - Be rewritten to use only scratch registers? > >> > > > > I think it is implied that the startup code does not adhere to the > > AAPCS. That code already uses r5 and r6 without stacking them, simply > > because we're in the middle of preparing the stack and other execution > > context, precisely so the C code we call into can rely on AAPCS > > guarantees. > > Ehm, hold on, what do you mean by 'call site'? This code just runs and > jumps back to a local label. There are no functions calls here until > the point where we call into C (with the exception of the lovely > ArmPlatformPeiBootAction() we added so Juno can find out how much DRAM > it can use) Yeah, you're right, I was misreading the block as a subroutine. Seems the only register that must be preserved across jumps is r5/x5, and neither of these modifications touch those (or change that fact). Reviewed-by: Leif Lindholm / Leif