From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::243; helo=mail-wm0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C81DC2035D109 for ; Fri, 10 Nov 2017 06:18:50 -0800 (PST) Received: by mail-wm0-x243.google.com with SMTP id b189so3058581wmd.4 for ; Fri, 10 Nov 2017 06:22:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=D/lo3+We393RGnUgMK5IzlPp2B1tmvDhuP+Cc93HWwY=; b=A8kGKN3qFVK6riNAZHgiapH05KROsbJWdYrz8WsqY4uEbZkMumCOuZN0DG/3zdCYpZ lAdD/TVq9Wz3TJ9yh+Bs0Pynj13XDVaUA07bGiNxnd804FsY74UJwWYXLUwkSyuzI/H3 iOQzZEsi7hrzlSpcpURQiO4pUzMsV1BnwuR6A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=D/lo3+We393RGnUgMK5IzlPp2B1tmvDhuP+Cc93HWwY=; b=O/chZ/dwuWrADi/5VcJlDCJRBtNthEw5Ur+uI2ZwNgy1brOv+5PLMCmbzfkOh1lRIn 1XbOS05luYK7OprO+BoAszhGKuaXGS96oW3ov2KNnXQTK9mVdXooEkf1c3Aag2xL4OvQ /qH4AyIPZt2HU3N105rciO3E8vVLOLLrWXR0gW2pw9AJr4kkPrT3YljYh5gUhgZ/YJuP wsp/gdHqxwXkhQGiWS7H/2JlDSpr7M5A2llPiN6arNaNuF3GVs0aVwK0+LdmGZOON6/3 wrtnJq/ob/xOZOlSpG34u48cQ2ks2LfWwoFC8OW06NIBP18gXkNdfwLlr4eJorRcL6o7 Gb5Q== X-Gm-Message-State: AJaThX5VjgzASCHIcAvSpydls01jxXfKrlx5Uwpuwep07VRfkTABqkcy V6FGFRvEastAiApRB0NN8D4D4SJThcE= X-Google-Smtp-Source: AGs4zMa1L0JOA3XSn68epPWJXtul8dM35PnMOA7FV+1eN4vgzXRgMl+0sLXrWcS2ciOmiArl8IsEdA== X-Received: by 10.28.142.20 with SMTP id q20mr353575wmd.37.1510323772124; Fri, 10 Nov 2017 06:22:52 -0800 (PST) Received: from localhost.localdomain ([160.167.170.128]) by smtp.gmail.com with ESMTPSA id e131sm1036477wmg.15.2017.11.10.06.22.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Nov 2017 06:22:51 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org, daniel.thompson@linaro.org Cc: masami.hiramatsu@linaro.org, methavanitpong.pipat@socionext.com, masahisa.kojima@linaro.org, Ard Biesheuvel Date: Fri, 10 Nov 2017 14:21:18 +0000 Message-Id: <20171110142127.12018-26-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171110142127.12018-1-ard.biesheuvel@linaro.org> References: <20171110142127.12018-1-ard.biesheuvel@linaro.org> Subject: [PATCH edk2-platforms v4 25/34] Silicon/SynQuacer: add description of EXIU to the device tree X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Nov 2017 14:18:51 -0000 Add a DT node for the external interrupt unit (EXIU), which handles interrupts from GPIO lines. We need OS support for this for things like PHY interrupts and a 'wake' button. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 966952b9a224..e72db377bc39 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -523,4 +523,13 @@ clocks = <&clk_apb>; base = <0>; }; + + exiu: interrupt-controller@510c0000 { + compatible = "socionext,synquacer-exiu"; + reg = <0x0 0x510c0000 0x0 0x20>; + interrupt-controller; + interrupt-parent = <&gic>; + #interrupt-cells = <3>; + socionext,spi-base = <112>; + }; }; -- 2.11.0