From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::242; helo=mail-wr0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x242.google.com (mail-wr0-x242.google.com [IPv6:2a00:1450:400c:c0c::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 57C392035521F for ; Fri, 10 Nov 2017 06:19:00 -0800 (PST) Received: by mail-wr0-x242.google.com with SMTP id o88so8730722wrb.6 for ; Fri, 10 Nov 2017 06:23:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=utU/oYwGPR8ChvpyfEuVaX8F0NduZ0m3rHgPWM0QRMo=; b=AZmys0ZappghXYI9QyKzApGWJSGRJ9t7QaNpwH55cFH19l7aZ57JEMxcnXNhddZuvM 3+m6i+0+Kc92PgRlNxG6XZMJmNv/R08/M1ouE9e04eqqnDmNvNpFS2UPaaYk+EIK3BZJ BbJK6EunSnT+QfkHVJKGec//Ape3D0hJhAFbA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=utU/oYwGPR8ChvpyfEuVaX8F0NduZ0m3rHgPWM0QRMo=; b=eyzQl3jan5UswQdYFL2skrI32vjZlgWZvhAyjL2Wn0k50C21DC+mHK1PzRKmZU9RxV nrAQEa/viYbe9yUjvOydkGQPXfcAFs9FwuzOmmQ1/deY9KYR6tEFTP7T0HtDf4mayBLf htttk+cTXnKUFtlEtkwT4OPd0fon+yZ+/vgqWipqMnJNHfuSIPbWCZECfj5y4Nm0moAc +/k8VowM3cqpWXoyNE0JZPRpBSu3T1BWF6vBtQwUj3QLuyqpElqv2F6zAYCutJF2RQPk 0JhbWhKLTedZKIUMMOmVGOiTnHkOQnJy/xjZHCjFq+vPNlzrTAYXYVEiF3Sxq7BBFomm VyZQ== X-Gm-Message-State: AJaThX5e02r6fIVOdpBIaVdnwCqY8/eGB9inMxmUGsOhfmWxJuQsdNkK g+93+QA3jBrymnJCeKlsufKf/EPZNyE= X-Google-Smtp-Source: AGs4zMbMKd2QwNN5FKJBZ8DJxk+586VFmZQ9Cl4KeH95/1Lin0Y/jM2wLWJN5hB98iATL+yI3OaxNA== X-Received: by 10.223.188.147 with SMTP id g19mr503851wrh.250.1510323781768; Fri, 10 Nov 2017 06:23:01 -0800 (PST) Received: from localhost.localdomain ([160.167.170.128]) by smtp.gmail.com with ESMTPSA id e131sm1036477wmg.15.2017.11.10.06.22.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Nov 2017 06:23:00 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org, daniel.thompson@linaro.org Cc: masami.hiramatsu@linaro.org, methavanitpong.pipat@socionext.com, masahisa.kojima@linaro.org, Ard Biesheuvel Date: Fri, 10 Nov 2017 14:21:22 +0000 Message-Id: <20171110142127.12018-30-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171110142127.12018-1-ard.biesheuvel@linaro.org> References: <20171110142127.12018-1-ard.biesheuvel@linaro.org> Subject: [PATCH edk2-platforms v4 29/34] Silicon/SynQuacer: implement 'clear NVRAM' feature using a DIP switch X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Nov 2017 14:19:00 -0000 Ordinary computers typically have a physical switch or jumper on the board that allows non-volatile settings to be cleared. Let's implement the same using DIP switch #1 on block #3, and clear the EFI variable store if it is set to ON at boot time. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 4 ++++ Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 4 ++++ Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf | 1 + Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c | 25 +++++++++++++++++++- Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf | 6 +++++ Silicon/Socionext/SynQuacer/SynQuacer.dec | 2 ++ 6 files changed, 41 insertions(+), 1 deletion(-) diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc index 10d070773cdc..af978db2c034 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc @@ -381,6 +381,9 @@ [PcdsFixedAtBuild.common] gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c # LNRO gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1 + # set DIP switch DSW3-PIN1 to clear the varstore + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0 + [PcdsPatchableInModule] gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0 gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0 @@ -418,6 +421,7 @@ [Components.common] MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf MdeModulePkg/Universal/Variable/Pei/VariablePei.inf MdeModulePkg/Universal/CapsulePei/CapsulePei.inf + Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc index 4630d78bce93..4034bcfe82c5 100644 --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc @@ -369,6 +369,9 @@ [PcdsFixedAtBuild.common] gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x08420000 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000 + # set DIP switch DSW3-PIN1 to clear the varstore + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0 + [PcdsPatchableInModule] gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0 gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0 @@ -406,6 +409,7 @@ [Components.common] MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf MdeModulePkg/Universal/Variable/Pei/VariablePei.inf MdeModulePkg/Universal/CapsulePei/CapsulePei.inf + Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf index 365085c8f243..4577bd316a1f 100644 --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf @@ -248,6 +248,7 @@ [FV.FVMAIN_COMPACT] INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf + INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf INF RuleOverride = FMP_IMAGE_DESC Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c index 358dd5a91f08..bd8ee7a368f5 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c @@ -21,6 +21,7 @@ #include #include #include +#include #include STATIC @@ -103,10 +104,32 @@ PlatformPeim ( VOID ) { - EFI_STATUS Status; + EMBEDDED_GPIO_PPI *Gpio; + EFI_STATUS Status; + UINTN Value; ASSERT (mDramInfo->NumRegions > 0); + Status = PeiServicesLocatePpi (&gEdkiiEmbeddedGpioPpiGuid, 0, NULL, + (VOID **)&Gpio); + ASSERT_EFI_ERROR (Status); + + Status = Gpio->Set (Gpio, FixedPcdGet32 (PcdClearSettingsGpioPin), + GPIO_MODE_INPUT); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "%a: failed to set GPIO as input - %r\n", __FUNCTION__, + Status)); + } else { + Status = Gpio->Get (Gpio, FixedPcdGet32 (PcdClearSettingsGpioPin), &Value); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "%a: failed to get GPIO state - %r\n", __FUNCTION__, + Status)); + } else if (Value > 0) { + DEBUG ((DEBUG_INFO, "%a: clearing NVRAM\n", __FUNCTION__)); + PeiServicesSetBootMode (BOOT_WITH_DEFAULT_SETTINGS); + } + } + // // Record the first region into PcdSystemMemoryBase and PcdSystemMemorySize. // This is the region we will use for UEFI itself. diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf index 70eb715d44e3..a6501fb205e1 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf @@ -25,6 +25,7 @@ [Sources] [Packages] ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -40,11 +41,16 @@ [LibraryClasses] [FixedPcd] gArmTokenSpaceGuid.PcdFvBaseAddress gArmTokenSpaceGuid.PcdFvSize + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin gSynQuacerTokenSpaceGuid.PcdDramInfoBase [Ppis] + gEdkiiEmbeddedGpioPpiGuid ## CONSUMES gSynQuacerDramInfoPpiGuid ## PRODUCES [Pcd] gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize + +[Depex] + gEdkiiEmbeddedGpioPpiGuid diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec index 1a683b81521b..c11550469cd0 100644 --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -30,3 +30,5 @@ [PcdsFixedAtBuild] gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase|0|UINT32|0x00000002 gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress|0|UINT8|0x00000003 + + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0|UINT32|0x00000004 -- 2.11.0