[PATCH 3/4] BaseTools: Add VS2017 ARM support

[Pete Batard <pete@akeo.ie>]

Requires the silencing of the following warnings:
* warning C4100: unreferenced formal parameter
* warning C4127: conditional expression is constant
* warning C4214: nonstandard extension used: bit field types other than int
Also requires _ARM_WINAPI_PARTITION_DESKTOP_SDK_AVAILABLE to be defined for
the Windows SDK to allow ARM compilation.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Pete Batard <pete@akeo.ie>
---
 ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm             | 255 ++++++++++++++++++++
 ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtsrsh.asm            |  45 ++++
 ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf |  13 +-
 ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c               |  30 +++
 ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c               |  29 +++
 BaseTools/Conf/build_rule.template                             |  30 +++
 BaseTools/Conf/tools_def.template                              |  30 +++
 MdePkg/Include/Base.h                                          |  15 ++
 MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm                   |   5 +-
 MdePkg/Library/BaseLib/BaseLib.inf                             |  19 +-
 MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf         |   5 +-
 MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c          |  18 ++
 12 files changed, 486 insertions(+), 8 deletions(-)

diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm
new file mode 100644
index 000000000000..096dc6317318
--- /dev/null
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm
@@ -0,0 +1,255 @@
+///** @file
+//
+//  This code provides replacement for MSVC CRT division functions
+//
+//  Copyright (c) 2017, Pete Batard. All rights reserved.<BR>
+//  Based on generated assembly of ReactOS' sdk/lib/crt/math/arm/__rt_###div.c,
+//  Copyright (c) Timo Kreuzer. All rights reserved.<BR>
+//
+//  This program and the accompanying materials
+//  are licensed and made available under the terms and conditions of the BSD License
+//  which accompanies this distribution.  The full text of the license may be found at
+//  http://opensource.org/licenses/bsd-license.php
+//
+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//**/
+
+  EXPORT _fltused
+  EXPORT __brkdiv0
+
+  EXPORT __rt_sdiv
+  EXPORT __rt_udiv
+  EXPORT __rt_udiv64
+  EXPORT __rt_sdiv64
+
+  AREA  Math, CODE, READONLY
+
+_fltused
+    dcd 0x9875
+
+__brkdiv0
+    udf #249
+
+//
+// uint64_t __rt_udiv(uint32_t divisor, uint32_t dividend)
+//
+
+__rt_udiv
+  cmp         r0, #0
+  beq         __brkdiv0
+  push        {r3-r5,lr}
+  mov         r5,r0
+  mov         r4,r1
+  cmp         r5,r4
+  it          hi
+  movhi       r0,#0
+  bhi         __rt_udiv_label3
+  clz         r2,r5
+  clz         r3,r4
+  subs        r3,r2,r3
+  movs        r1,#1
+  lsl         r2,r5,r3
+  lsl         r3,r1,r3
+  movs        r0,#0
+__rt_udiv_label1
+  cmp         r4,r2
+  bcc         __rt_udiv_label2
+  orrs        r0,r0,r3
+  subs        r4,r4,r2
+__rt_udiv_label2
+  lsrs        r2,r2,#1
+  lsrs        r3,r3,#1
+  bne         __rt_udiv_label1
+__rt_udiv_label3
+  mov         r1,r4
+  pop         {r3-r5,pc}
+
+//
+// uint64_t __rt_sdiv(int32_t divisor, int32_t dividend)
+//
+
+__rt_sdiv
+  cmp         r0, #0
+  beq         __brkdiv0
+  push        {r4-r6,lr}
+  mov         r4,r1
+  ands        r6,r0,#0x80000000
+  it          ne
+  rsbne       r4,r4,#0
+  mov         r5,r0
+  rsbs        r5,r5,#0
+  cmp         r5,r4
+  it          hi
+  movhi       r0,#0
+  bhi         __rt_sdiv_label3
+  clz         r2,r5
+  clz         r3,r4
+  subs        r3,r2,r3
+  movs        r1,#1
+  lsl         r2,r5,r3
+  lsl         r3,r1,r3
+  movs        r0,#0
+__rt_sdiv_label1
+  cmp         r4,r2
+  bcc         __rt_sdiv_label2
+  orrs        r0,r0,r3
+  subs        r4,r4,r2
+__rt_sdiv_label2
+  lsrs        r2,r2,#1
+  lsrs        r3,r3,#1
+  bne         __rt_sdiv_label1
+__rt_sdiv_label3
+  cbz         r6,__rt_sdiv_label4
+  rsbs        r4,r4,#0
+__rt_sdiv_label4
+  mov         r1,r4
+  pop         {r4-r6,pc}
+
+//
+// typedef struct {
+//   uint64_t quotient;
+//   uint64_t modulus;
+// } udiv64_result_t;
+//
+// void __rt_udiv64_internal(udiv64_result_t *result, uint64_t divisor, uint64_t dividend)
+//
+
+__rt_udiv64_internal
+  orrs        r1,r2,r3
+  beq         __brkdiv0
+  push        {r4-r8,lr}
+  mov         r7,r3
+  mov         r6,r2
+  mov         r4,r0
+  ldrd        r0,r5,[sp,#0x18]
+  cmp         r7,r5
+  bcc         __rt_udiv64_internal_label2
+  bhi         __rt_udiv64_internal_label1
+  cmp         r6,r0
+  bls         __rt_udiv64_internal_label2
+__rt_udiv64_internal_label1
+  movs        r3,#0
+  strd        r3,r3,[r4]
+  b           __rt_udiv64_internal_label8
+__rt_udiv64_internal_label2
+  clz         r2,r7
+  cmp         r2,#0x20
+  bne         __rt_udiv64_internal_label3
+  clz         r3,r6
+  add         r2,r2,r3
+__rt_udiv64_internal_label3
+  clz         r1,r5 ;
+  cmp         r1,#0x20
+  bne         __rt_udiv64_internal_label4
+  clz         r3,r0
+  add         r1,r1,r3
+__rt_udiv64_internal_label4
+  subs        r1,r2,r1
+  rsb         r3,r1,#0x20
+  lsr         r3,r6,r3
+  lsl         r2,r7,r1
+  orrs        r2,r2,r3
+  sub         r3,r1,#0x20
+  lsl         r3,r6,r3
+  orrs        r2,r2,r3
+  lsl         r7,r6,r1
+  sub         r3,r1,#0x20
+  movs        r6,#1
+  lsls        r6,r6,r3
+  movs        r3,#1
+  mov         lr,#0
+  lsl         r1,r3,r1
+  mov         r8,lr
+__rt_udiv64_internal_label5
+  cmp         r5,r2
+  bcc         __rt_udiv64_internal_label7
+  bhi         __rt_udiv64_internal_label6
+  cmp         r0,r7
+  bcc         __rt_udiv64_internal_label7
+__rt_udiv64_internal_label6
+  subs        r0,r0,r7
+  sbcs        r5,r5,r2
+  orr         lr,lr,r1
+  orr         r8,r8,r6
+__rt_udiv64_internal_label7
+  lsls        r3,r2,#0x1F
+  orr         r7,r3,r7,lsr #1
+  lsls        r3,r6,#0x1F
+  orr         r1,r3,r1,lsr #1
+  lsrs        r6,r6,#1
+  lsrs        r2,r2,#1
+  orrs        r3,r1,r6
+  bne         __rt_udiv64_internal_label5
+  strd        lr,r8,[r4]
+__rt_udiv64_internal_label8
+  str         r5,[r4,#0xC]
+  str         r0,[r4,#8]
+  pop         {r4-r8,pc}
+
+//
+// {int64_t, int64_t} __rt_sdiv64(int64_t divisor, int64_t dividend)
+//
+
+__rt_sdiv64
+  push        {r4-r6,lr}
+  sub         sp,sp,#0x18
+  and         r6,r1,#0x80000000
+  movs        r4,r6
+  mov         r5,r0
+  beq         __rt_sdiv64_label1
+  movs        r0,#0
+  rsbs        r2,r2,#0
+  sbc         r3,r0,r3
+__rt_sdiv64_label1
+  movs        r4,r6
+  beq         __rt_sdiv64_label2
+  movs        r0,#0
+  rsbs        r5,r5,#0
+  sbc         r1,r0,r1
+__rt_sdiv64_label2
+  str         r2,[sp]
+  str         r3,[sp,#4]
+  mov         r3,r1
+  mov         r2,r5
+  add         r0,sp,#8
+  bl          __rt_udiv64_internal
+  movs        r3,r6
+  beq         __rt_sdiv64_label3
+  ldrd        r3,r2,[sp,#0x10]
+  movs        r1,#0
+  rsbs        r3,r3,#0
+  sbcs        r1,r1,r2
+  b           __rt_sdiv64_label4
+__rt_sdiv64_label3
+  ldrd        r3,r1,[sp,#0x10]
+__rt_sdiv64_label4
+  mov         r2,r3
+  ldr         r0,[sp,#8]
+  mov         r3,r1
+  ldr         r1,[sp,#0xC]
+  add         sp,sp,#0x18
+  pop         {r4-r6,pc}
+
+//
+// {uint64_t, uint64_t} __rt_udiv64(uint64_t divisor, uint64_t dividend)
+//
+
+__rt_udiv64
+  push        {r4,r5,lr}
+  sub         sp,sp,#0x1C
+  mov         r4,r2
+  mov         r2,r0
+  mov         r5,r3
+  add         r0,sp,#8
+  mov         r3,r1
+  str         r4,[sp]
+  str         r5,[sp,#4]
+  bl          __rt_udiv64_internal
+  ldrd        r2,r3,[sp,#0x10]
+  ldrd        r0,r1,[sp,#8]
+  add         sp,sp,#0x1C
+  pop         {r4,r5,pc}
+
+  END
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtsrsh.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtsrsh.asm
new file mode 100644
index 000000000000..2332dda823f2
--- /dev/null
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtsrsh.asm
@@ -0,0 +1,45 @@
+///** @file
+//
+//  This code provides replacement for MSVC CRT __rt_srsh
+//
+//  Copyright (c) Timo Kreuzer. All rights reserved.<BR>
+//
+//  This program and the accompanying materials
+//  are licensed and made available under the terms and conditions of the BSD License
+//  which accompanies this distribution.  The full text of the license may be found at
+//  http://opensource.org/licenses/bsd-license.php
+//
+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//**/
+
+  EXPORT  __rt_srsh
+
+  AREA  Math, CODE, READONLY
+
+//
+//  int64_t __rt_srsh(int64_t  value, uint32_t shift);
+//
+
+__rt_srsh
+    rsbs r3, r2, #32
+    bmi __rt_srsh_label1
+    lsr r0, r0, r2
+    lsl r3, r1, r3
+    orr r0, r0, r3
+    asr r1, r1, r2
+    bx  lr
+__rt_srsh_label1
+    cmp r2, 64
+    bhs __rt_srsh_label2
+    sub r3, r2, #32
+    asr r0, r1, r3
+    asr r1, r1, #32
+    bx  lr
+__rt_srsh_label2
+    asr r1, r1, #32
+    mov r0, r1
+    bx  lr
+
+  END
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf b/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
index 44333141a70a..0dacc5e5117d 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
@@ -23,8 +23,12 @@ [Defines]
   LIBRARY_CLASS                  = CompilerIntrinsicsLib
 
 [Sources]
-  memcpy.c
-  memset.c
+  memcpy.c             | RVCT
+  memcpy.c             | GCC
+  memcpy_ms.c          | MSFT
+  memset.c             | RVCT
+  memset.c             | GCC
+  memset_ms.c          | MSFT
 
 [Sources.ARM]
   Arm/mullu.asm        | RVCT
@@ -94,6 +98,8 @@ [Sources.ARM]
   Arm/llsr.S       | GCC
   Arm/llsl.S       | GCC
 
+  Arm/rtdiv.asm    | MSFT
+  Arm/rtsrsh.asm   | MSFT
 
 [Packages]
   MdePkg/MdePkg.dec
@@ -101,3 +107,6 @@ [Packages]
 
 [LibraryClasses]
 
+[BuildOptions]
+  MSFT:*_*_ARM_CC_FLAGS = /GL-
+  MSFT:*_*_AARCH64_CC_FLAGS = /GL-
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c b/ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c
new file mode 100644
index 000000000000..19d89c190362
--- /dev/null
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c
@@ -0,0 +1,30 @@
+//------------------------------------------------------------------------------
+//
+// Copyright (c) 2017, Pete Batard. All rights reserved.<BR>
+//
+// This program and the accompanying materials are licensed and made
+// available under the terms and conditions of the BSD License which
+// accompanies this distribution.  The full text of the license may be
+// found at http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+// IMPLIED.
+//
+//------------------------------------------------------------------------------
+
+#include <stddef.h>        // For size_t
+
+void* memcpy(void *, const void *, size_t);
+#pragma intrinsic(memcpy)
+#pragma function(memcpy)
+void* memcpy(void *dest, const void *src, size_t n)
+{
+  unsigned char *d = dest;
+  unsigned char const *s = src;
+
+  while (n--)
+    *d++ = *s++;
+
+  return dest;
+}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c b/ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c
new file mode 100644
index 000000000000..229466faef2f
--- /dev/null
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c
@@ -0,0 +1,29 @@
+//------------------------------------------------------------------------------
+//
+// Copyright (c) 2017, Pete Batard. All rights reserved.<BR>
+//
+// This program and the accompanying materials are licensed and made
+// available under the terms and conditions of the BSD License which
+// accompanies this distribution.  The full text of the license may be
+// found at http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+// IMPLIED.
+//
+//------------------------------------------------------------------------------
+
+#include <stddef.h>        // For size_t
+
+void* memset(void *, int, size_t);
+#pragma intrinsic(memset)
+#pragma function(memset)
+void *memset(void *s, int c, size_t n)
+{
+  unsigned char *d = s;
+
+  while (n--)
+    *d++ = (unsigned char)c;
+
+  return s;
+}
diff --git a/BaseTools/Conf/build_rule.template b/BaseTools/Conf/build_rule.template
index 3e6aa8ff0f34..08c1df14af90 100755
--- a/BaseTools/Conf/build_rule.template
+++ b/BaseTools/Conf/build_rule.template
@@ -207,6 +207,36 @@
         # For RVCTCYGWIN ASM_FLAGS must be first to work around pathing issues
         "$(ASM)" $(ASM_FLAGS) -o ${dst} $(INC) ${d_path}(+)${s_base}.iii
 
+[Assembly-Code-File.COMMON.ARM]
+    # Remove --convert-hex for ARM as it breaks MSFT assemblers
+    <InputFile.MSFT, InputFile.INTEL, InputFile.RVCT>
+        ?.asm, ?.Asm, ?.ASM
+
+    <InputFile.GCC, InputFile.GCCLD>
+        ?.S, ?.s
+
+    <ExtraDependency>
+        $(MAKE_FILE)
+
+    <OutputFile>
+        $(OUTPUT_DIR)(+)${s_dir}(+)${s_base}.obj
+
+    <Command.INTEL>
+        "$(PP)" $(PP_FLAGS) $(INC) ${src} > ${d_path}(+)${s_base}.i
+        Trim --source-code --convert-hex --trim-long -o ${d_path}(+)${s_base}.iii ${d_path}(+)${s_base}.i
+        "$(ASM)" /Fo${dst} $(ASM_FLAGS) /I${s_path} $(INC) ${d_path}(+)${s_base}.iii
+
+    <Command.MSFT>
+        "$(PP)" $(PP_FLAGS) $(INC) ${src} > ${d_path}(+)${s_base}.i
+        Trim --source-code --trim-long -o ${d_path}(+)${s_base}.iii ${d_path}(+)${s_base}.i
+        "$(ASM)" /Fo${dst} $(ASM_FLAGS) /I${s_path} $(INC) ${d_path}(+)${s_base}.iii
+
+    <Command.GCC, Command.GCCLD, Command.RVCT>
+        "$(PP)" $(PP_FLAGS) $(INC) ${src} > ${d_path}(+)${s_base}.i
+        Trim --trim-long --source-code -o ${d_path}(+)${s_base}.iii ${d_path}(+)${s_base}.i
+        # For RVCTCYGWIN ASM_FLAGS must be first to work around pathing issues
+        "$(ASM)" $(ASM_FLAGS) -o ${dst} $(INC) ${d_path}(+)${s_base}.iii
+
 [Nasm-Assembly-Code-File.COMMON.COMMON]
     <InputFile>
         ?.nasm
diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
index 0346750886a2..4bc057f1a568 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -77,6 +77,7 @@ DEFINE VS2015x86_BINX64 = DEF(VS2015x86_BIN)\x86_amd64
 DEFINE VS2017_BIN         = ENV(VS2017_PREFIX)bin\Hostx86
 DEFINE VS2017_BIN_IA32    = DEF(VS2017_BIN)\x86
 DEFINE VS2017_BIN_X64     = DEF(VS2017_BIN)\x64
+DEFINE VS2017_BIN_ARM     = DEF(VS2017_BIN)\arm
 
 DEFINE WINSDK_BIN       = ENV(WINSDK_PREFIX)
 DEFINE WINSDKx86_BIN    = ENV(WINSDKx86_PREFIX)
@@ -4169,6 +4170,35 @@ NOOPT_VS2017_X64_NASM_FLAGS     = -O0 -f win64 -g
 RELEASE_VS2017_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data
 NOOPT_VS2017_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG
 
+#################
+# ARM definitions
+#################
+*_VS2017_ARM_*_DLL                = DEF(VS2017_BIN_ARM)
+
+*_VS2017_ARM_CC_PATH              = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_VFRPP_PATH           = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_SLINK_PATH           = DEF(VS2017_BIN_ARM)\lib.exe
+*_VS2017_ARM_DLINK_PATH           = DEF(VS2017_BIN_ARM)\link.exe
+*_VS2017_ARM_APP_PATH             = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_PP_PATH              = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_ASM_PATH             = DEF(VS2017_BIN_ARM)\armasm.exe
+*_VS2017_ARM_ASLCC_PATH           = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_ASLPP_PATH           = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_ASLDLINK_PATH        = DEF(VS2017_BIN_ARM)\link.exe
+
+      *_VS2017_ARM_MAKE_FLAGS     = /nologo
+  DEBUG_VS2017_ARM_CC_FLAGS       = /nologo /c /WX /wd4100 /wd4127 /wd4214 /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gm /Gw /Oi- /D_ARM_WINAPI_PARTITION_DESKTOP_SDK_AVAILABLE
+RELEASE_VS2017_ARM_CC_FLAGS       = /nologo /c /WX /wd4100 /wd4127 /wd4214 /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gw /Oi- /D_ARM_WINAPI_PARTITION_DESKTOP_SDK_AVAILABLE
+NOOPT_VS2017_ARM_CC_FLAGS         = /nologo /c /WX /wd4100 /wd4127 /wd4214 /GS- /W4 /Gs32768 /D UNICODE /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gm /Od /Oi- /D_ARM_WINAPI_PARTITION_DESKTOP_SDK_AVAILABLE
+
+  DEBUG_VS2017_ARM_ASM_FLAGS      = /nologo /g
+RELEASE_VS2017_ARM_ASM_FLAGS      = /nologo
+NOOPT_VS2017_ARM_ASM_FLAGS        = /nologo
+
+  DEBUG_VS2017_ARM_DLINK_FLAGS    = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG
+RELEASE_VS2017_ARM_DLINK_FLAGS    = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data
+NOOPT_VS2017_ARM_DLINK_FLAGS      = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG
+
 ####################################################################################
 #
 # Microsoft Device Driver Kit 3790.1830 (IA-32, X64, Itanium, with Link Time Code Generation)
diff --git a/MdePkg/Include/Base.h b/MdePkg/Include/Base.h
index 02140a5ac2ee..3bf8ede016de 100644
--- a/MdePkg/Include/Base.h
+++ b/MdePkg/Include/Base.h
@@ -631,6 +631,21 @@ struct _LIST_ENTRY {
 
 #define VA_COPY(Dest, Start)          __va_copy (Dest, Start)
 
+#elif defined(_M_ARM)
+//
+// MSFT ARM variable argument list support.
+//
+
+// Standard Visual Studio header
+#include <stdarg.h>
+
+typedef char* VA_LIST;
+
+#define VA_START(ap, num)             va_start(ap, num)
+#define VA_ARG(ap, type)              va_arg(ap, type)
+#define VA_END(ap)                    va_end(ap)
+#define VA_COPY(dest, src)            va_copy(dest, src)
+
 #elif defined(__GNUC__)
 
 #if defined(MDE_CPU_X64) && !defined(NO_MSABI_VA_FUNCS)
diff --git a/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
index 8a8065159bf2..2e508d6f1ad8 100644
--- a/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
+++ b/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
@@ -16,7 +16,10 @@
 
     EXPORT CpuBreakpoint
 
-  AREA Cpu_Breakpoint, CODE, READONLY
+; Force ARM mode for this section, as MSFT assembler defaults to THUMB
+  AREA Cpu_Breakpoint, CODE, READONLY, ARM
+
+    ARM
 
 ;/**
 ;  Generates a breakpoint on the CPU.
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 320ac457ea3d..4337a125d516 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -821,8 +821,9 @@ [Sources.EBC]
 [Sources.ARM]
   Arm/InternalSwitchStack.c
   Arm/Unaligned.c
-  Math64.c                   | RVCT 
-    
+  Math64.c                   | RVCT
+  Math64.c                   | MSFT
+
   Arm/SwitchStack.asm        | RVCT
   Arm/SetJumpLongJump.asm    | RVCT
   Arm/DisableInterrupts.asm  | RVCT
@@ -831,7 +832,16 @@ [Sources.ARM]
   Arm/CpuPause.asm           | RVCT
   Arm/CpuBreakpoint.asm      | RVCT
   Arm/MemoryFence.asm        | RVCT
- 
+
+  Arm/SwitchStack.asm        | MSFT
+  Arm/SetJumpLongJump.asm    | MSFT
+  Arm/DisableInterrupts.asm  | MSFT
+  Arm/EnableInterrupts.asm   | MSFT
+  Arm/GetInterruptsState.asm | MSFT
+  Arm/CpuPause.asm           | MSFT
+  Arm/CpuBreakpoint.asm      | MSFT
+  Arm/MemoryFence.asm        | MSFT
+
   Arm/Math64.S                  | GCC
   Arm/SwitchStack.S             | GCC
   Arm/EnableInterrupts.S        | GCC
@@ -870,3 +880,6 @@ [Pcd]
 
 [FeaturePcd]
   gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList  ## CONSUMES
+
+[BuildOptions]
+  MSFT:*_*_ARM_CC_FLAGS = /GL-
diff --git a/MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf b/MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
index d02d97107b08..e280651b1199 100644
--- a/MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
+++ b/MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
@@ -30,8 +30,9 @@ [Defines]
 #
 
 [Sources]
-  BaseStackCheckGcc.c | GCC
-  BaseStackCheckGcc.c | RVCT
+  BaseStackCheckGcc.c  | GCC
+  BaseStackCheckGcc.c  | RVCT
+  BaseStackCheckNull.c | MSFT
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c b/MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c
new file mode 100644
index 000000000000..fb2f65929d3e
--- /dev/null
+++ b/MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c
@@ -0,0 +1,18 @@
+/*++
+
+ Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution.  The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Abstract:
+
+  This file is purely empty as a work around for BaseStackCheck to pass MSVC build.
+
+**/
+
+extern int __BaseStackCheckNull;
-- 
2.14.2