From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::242; helo=mail-wm0-x242.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x242.google.com (mail-wm0-x242.google.com [IPv6:2a00:1450:400c:c09::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 42F5F2035A7A2 for ; Thu, 16 Nov 2017 07:40:51 -0800 (PST) Received: by mail-wm0-x242.google.com with SMTP id r68so1127958wmr.3 for ; Thu, 16 Nov 2017 07:45:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=GHn5YAUN5ftLMxoicekFQG0nAPlKH6a79o/qT36B7sc=; b=LXIKGyy0fw91E/kZmylhzNLU+eO14jAnbRCUfybD8ciavK4Tlr28ocfSxvujcDclcR cBWrJC45bbAoytYkLSkGJCKkCjqK97mjNk7+HLPMHF1GtCYdiE8X6zH1UXxwStWEtNYA nrhThGWjjmwkfaKjq3ZOInGqpkxY4Wsp4+1yc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=GHn5YAUN5ftLMxoicekFQG0nAPlKH6a79o/qT36B7sc=; b=AOvShON/13TjgRGRcBYdY5XdrHaCgNHBm8wwjEfTpZhS8zZR2f+ca42VMtma68zLv4 nIdiLWI8ziCRm0x46XsUIWHXZX9yo2OLFSWMtAWuFQSOKQOUK3M3ss7MrIpIQUpbwrAz f9UTZu8lpsVJMq4DfuSC0//KnIMLnXRlQ/qrKxI+Kl92ewiWR1o7nvxaWNOBK1fH7UwZ LnQdfuq6xlfiP8TQX8Z2wpmIyxscTj1T9jOl4mdJCUl4dxfTGp/8HMktDBdVr1toGHO4 DLnBHrH4byprwN7IQuBsKnQh6yysrSIpdMcJXfxNZptiR9qkCNsTEg0p9/NuP2r4FJBZ N1lg== X-Gm-Message-State: AJaThX7A6jv5m6mNWfMlMJhb6Or9hTYWuYAra/GdNQrg7wxUw+Ir9CmT oam1u7u8kjbrZHOSL1vWpVBl6Q== X-Google-Smtp-Source: AGs4zMZro15q4LpfboQkWgfGouocnwcLc3QyBGvI5fg0cLs6msggDnCMDXE/wAMmKO8om2Egg5IVLg== X-Received: by 10.28.221.138 with SMTP id u132mr1728688wmg.113.1510847099369; Thu, 16 Nov 2017 07:44:59 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id 29sm1382058wrz.77.2017.11.16.07.44.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 16 Nov 2017 07:44:58 -0800 (PST) Date: Thu, 16 Nov 2017 15:44:56 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, lersek@redhat.com Message-ID: <20171116154456.xcwtsvugsdpiwmop@bivouac.eciton.net> References: <20171116143546.2409-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20171116143546.2409-1-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH] ArmPkg: move RVCT PLATFORM_FLAGS override into ArmHvcLib/ArmSmcLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 Nov 2017 15:40:51 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Nov 16, 2017 at 02:35:46PM +0000, Ard Biesheuvel wrote: > Currently, each ARM platform built with RVCT that uses ArmHvcLib > or ArmSmcLib needs to specify a CPU target that implements both the > security and virtualization extensions, so that the assembler does > not choke on the 'hvc' and 'smc' instructions in ArmHvcLib/ArmSvcLib. > Let's move these overrides into the module .INFs so we can lift this > requirement at the platform side. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > --- > ArmPkg/ArmPkg.dsc | 2 -- > ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf | 3 +++ > ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf | 3 +++ > 3 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc > index 382e99868453..622720ab2aef 100644 > --- a/ArmPkg/ArmPkg.dsc > +++ b/ArmPkg/ArmPkg.dsc > @@ -33,8 +33,6 @@ [Defines] > [BuildOptions] > XCODE:*_*_ARM_PLATFORM_FLAGS == -arch armv7 > GCC:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a -mfpu=neon > - # We use A15 to get the Secure and Virtualization extensions > - RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 > > RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG > *_*_*_CC_FLAGS = -DDISABLE_NEW_DEPRECATED_INTERFACES > diff --git a/ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf b/ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf > index 92efac5741c8..d046ef3ba253 100644 > --- a/ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf > +++ b/ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf > @@ -30,3 +30,6 @@ [Sources.AARCH64] > [Packages] > MdePkg/MdePkg.dec > ArmPkg/ArmPkg.dec > + > +[BuildOptions] > + RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 > diff --git a/ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf b/ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf > index 9f9ba729967c..0aa64d467129 100644 > --- a/ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf > +++ b/ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf > @@ -29,3 +29,6 @@ [Sources.AARCH64] > [Packages] > MdePkg/MdePkg.dec > ArmPkg/ArmPkg.dec > + > +[BuildOptions] > + RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 For this one, you should be able to get away with --cpu 7-A.security rather than listing a random CPU that happens to implement the required extension. This on the surface minor cleanup makes me unreasonably happy - thanks. So if you can fold that in: Reviewed-by: Leif Lindholm For whatever reason, a --cpu 7-A.virtualization never seems to have been implemented... / Leif