From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::234; helo=mail-wr0-x234.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x234.google.com (mail-wr0-x234.google.com [IPv6:2a00:1450:400c:c0c::234]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 29B2C220D4BE1 for ; Fri, 17 Nov 2017 07:42:49 -0800 (PST) Received: by mail-wr0-x234.google.com with SMTP id o14so2467208wrf.9 for ; Fri, 17 Nov 2017 07:47:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=QTVKY3v7V8xCKV9hfBbLfhxV3y5rVWmU4xWuctu4xbs=; b=PNFazWnjbKPh0Zdm9wnpTKGqbZzAvJ1o6QV6XeG+FHRP+6XUn7Mze32c4tIIo6V3pV 2gCOK7Nfn6QD1wjbCgBJf4sx3Ephf2f0bHDGKexSF4cMbedsa07TYWn/z24QkQxdQ0xx 0SSwOEWM+cgb9P6AV1Ta8fFnIr63PVH71aeR8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=QTVKY3v7V8xCKV9hfBbLfhxV3y5rVWmU4xWuctu4xbs=; b=kAFJn7PVhk8Uv0bMcs5x6ADeBxUiLjLFCNrj8rG9N9G+0YvNp5ecO++sL0t4SueSFh n+zp5D3Fgg3EY+jtXrgCmsbRcc0UR2wk0O0rl/mknLwZzBPkzu1Mod7FXs/od3jkyXJ5 IVot46sMEq3tLHYC+IRcjXd/HIy3MhCu9VD7VduT/LnjxbNI1M6pkrmshplj5rUxDh+9 5xEYO+aDtFZT9yVfWHEvAWZl2DzaGNw4e3uEiXeun196LiUg+oyaCbJpB3Dxwj1Bc2lg zSO2W6UGPdqI0Q4y9YzfrBWigxan6WSm5/OP/TC2HfI15JAHsP5UmotVsmrv8iFPyUHk XGpw== X-Gm-Message-State: AJaThX6AsMSNTZeJ8xQlIM+XpW8y8nSDWT7eGwblb/y7RvMlnLLX7yjF 9/5hDj55cp2NcBfSrzEwkxff2g== X-Google-Smtp-Source: AGs4zMaQE1vcnmJ6Q5GwOahpuug5co7gxPPp8mtQdTg7EJ5DkpL47DkyJKPWhBevbSvGygTU8akbGg== X-Received: by 10.223.200.133 with SMTP id k5mr639651wrh.79.1510933619258; Fri, 17 Nov 2017 07:46:59 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id r14sm8021694wrb.43.2017.11.17.07.46.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 17 Nov 2017 07:46:58 -0800 (PST) Date: Fri, 17 Nov 2017 15:46:56 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, daniel.thompson@linaro.org, masami.hiramatsu@linaro.org, methavanitpong.pipat@socionext.com, masahisa.kojima@linaro.org Message-ID: <20171117154656.ynd4ugjtr3azirmv@bivouac.eciton.net> References: <20171110142127.12018-1-ard.biesheuvel@linaro.org> <20171110142127.12018-29-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20171110142127.12018-29-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v4 28/34] Silicon/SynQuacer: implement PEIM that exposes GPIO PPI X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 17 Nov 2017 15:42:50 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Nov 10, 2017 at 02:21:21PM +0000, Ard Biesheuvel wrote: > In order to be able to sample the state of the DIP switches at early > boot on the Developer Box platform, implement the GPIO PPI based on > the GPIO block that is implemented in the SynQuacer SoC. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.c | 203 ++++++++++++++++++++ > Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf | 47 +++++ > 2 files changed, 250 insertions(+) > > diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.c b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.c > new file mode 100644 > index 000000000000..24d08b4e5899 > --- /dev/null > +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.c > @@ -0,0 +1,203 @@ > +/** @file > + > + Copyright (c) 2017, Linaro, Ltd. All rights reserved.
> + > + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the BSD License > + which accompanies this distribution. The full text of the license may be found at > + http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > + > +**/ > + > +#include > +#include > +#include > +#include > +#include > + > +#define PDR(x) (SYNQUACER_GPIO_BASE + 4 * (GPIO_PIN (x) >> 3)) > +#define DDR(x) (SYNQUACER_GPIO_BASE + 0x10 + 4 * (GPIO_PIN (x) >> 3)) > +#define PFR(x) (SYNQUACER_GPIO_BASE + 0x20 + 4 * (GPIO_PIN (x) >> 3)) > + > +#define GPIO_BIT(x) (1U << (GPIO_PIN (x) % 8)) > + > +STATIC CONST UINTN mGpioPinCount = 32; > + > +/** > + > + Gets the state of a GPIO pin > + > + @param This Pointer to protocol > + @param Gpio Which pin to read > + @param Value State of the pin > + > + @retval EFI_SUCCESS GPIO state returned in Value > + @retval EFI_INVALID_PARAMETER Value is NULL > + @retval EFI_NOT_FOUND Pin does not exit > + > +**/ > +STATIC > +EFI_STATUS > +EFIAPI > +GpioGet ( > + IN EMBEDDED_GPIO_PPI *This, > + IN EMBEDDED_GPIO_PIN Gpio, > + OUT UINTN *Value > + ) > +{ > + if (Value == NULL) { > + return EFI_INVALID_PARAMETER; > + } > + if (GPIO_PORT (Gpio) > 0 || GPIO_PIN (Gpio) >= mGpioPinCount) { > + return EFI_NOT_FOUND; > + } > + > + *Value = ((MmioRead32 (PDR (GPIO_PIN (Gpio))) & GPIO_BIT (Gpio)) != 0); > + > + return EFI_SUCCESS; > +} > + > +/** > + > + Sets the state of a GPIO pin > + > + @param This Pointer to protocol > + @param Gpio Which pin to modify > + @param Mode Mode to set > + > + @retval EFI_SUCCESS GPIO set as requested > + @retval EFI_INVALID_PARAMETER Invalid mode > + @retval EFI_NOT_FOUND Pin does not exit > + > +**/ > +STATIC > +EFI_STATUS > +EFIAPI > +GpioSet ( > + IN EMBEDDED_GPIO_PPI *This, > + IN EMBEDDED_GPIO_PIN Gpio, > + IN EMBEDDED_GPIO_MODE Mode > + ) > +{ > + if (GPIO_PORT (Gpio) > 0 || GPIO_PIN (Gpio) >= mGpioPinCount) { > + return EFI_NOT_FOUND; > + } > + > + switch (Mode) { > + case GPIO_MODE_INPUT: > + MmioAnd32 (DDR (GPIO_PIN (Gpio)), ~GPIO_BIT (Gpio)); > + break; > + > + case GPIO_MODE_OUTPUT_0: > + MmioOr32 (DDR (GPIO_PIN (Gpio)), GPIO_BIT (Gpio)); > + MmioAnd32 (PDR (GPIO_PIN (Gpio)), ~GPIO_BIT (Gpio)); > + break; > + > + case GPIO_MODE_OUTPUT_1: > + MmioOr32 (DDR (GPIO_PIN (Gpio)), GPIO_BIT (Gpio)); > + MmioOr32 (PDR (GPIO_PIN (Gpio)), GPIO_BIT (Gpio)); > + break; > + > + default: > + return EFI_INVALID_PARAMETER; > + } > + return EFI_SUCCESS; > +} > + > + > +/** > + > + Gets the mode (function) of a GPIO pin > + > + @param This Pointer to protocol > + @param Gpio Which pin > + @param Mode Pointer to output mode value > + > + @retval EFI_SUCCESS Mode value retrieved > + @retval EFI_INVALID_PARAMETER Mode is NULL > + @retval EFI_NOT_FOUND Pin does not exit > + > +**/ > +STATIC > +EFI_STATUS > +EFIAPI > +GpioGetMode ( > + IN EMBEDDED_GPIO_PPI *This, > + IN EMBEDDED_GPIO_PIN Gpio, > + OUT EMBEDDED_GPIO_MODE *Mode > + ) > +{ > + if (Mode == NULL) { > + return EFI_INVALID_PARAMETER; > + } > + if (GPIO_PORT (Gpio) > 0 || GPIO_PIN (Gpio) >= mGpioPinCount) { > + return EFI_NOT_FOUND; > + } > + > + if (!(MmioRead32 (DDR (GPIO_PIN (Gpio))) & GPIO_BIT (Gpio))) { > + *Mode = GPIO_MODE_INPUT; > + } else if (!(MmioRead32 (PDR (GPIO_PIN (Gpio))) & GPIO_BIT (Gpio))) { > + *Mode = GPIO_MODE_OUTPUT_0; > + } else { > + *Mode = GPIO_MODE_OUTPUT_1; > + } > + return EFI_SUCCESS; > +} > + > + > +/** > + > + Sets the pull-up / pull-down resistor of a GPIO pin > + > + @param This Pointer to PPI > + @param Gpio Port/pin index > + @param Pull The pullup/pulldown mode to set > + > + @retval EFI_SUCCESS Mode was set > + @retval EFI_NOT_FOUND Pin does not exist > + @retval EFI_UNSUPPORTED Action not supported > + > +**/ > +STATIC > +EFI_STATUS > +EFIAPI > +GpioSetPull ( > + IN EMBEDDED_GPIO_PPI *This, > + IN EMBEDDED_GPIO_PIN Gpio, > + IN EMBEDDED_GPIO_PULL Pull > + ) > +{ > + if (Pull != GPIO_PULL_NONE) { > + return EFI_UNSUPPORTED; > + } > + if (GPIO_PORT (Gpio) > 0 || GPIO_PIN (Gpio) >= mGpioPinCount) { > + return EFI_NOT_FOUND; > + } > + return EFI_SUCCESS; > +} > + > +STATIC EMBEDDED_GPIO_PPI mGpioPpi = { > + GpioGet, > + GpioSet, > + GpioGetMode, > + GpioSetPull, > +}; > + > +STATIC CONST EFI_PEI_PPI_DESCRIPTOR mEmbeddedGpioPpiDescriptor = { > + EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST, > + &gEdkiiEmbeddedGpioPpiGuid, > + &mGpioPpi > +}; > + > +EFI_STATUS > +EFIAPI > +SynQuacerGpioPeiEntryPoint ( > + IN EFI_PEI_FILE_HANDLE FfsHeader, > + IN CONST EFI_PEI_SERVICES **PeiServices > + ) > +{ > + return PeiServicesInstallPpi (&mEmbeddedGpioPpiDescriptor); > +} > diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf > new file mode 100644 > index 000000000000..dbb5e9d4c53a > --- /dev/null > +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf > @@ -0,0 +1,47 @@ > +#/* @file > +# > +# Copyright (c) 2017, Linaro, Ltd. All rights reserved.
> +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of the BSD License > +# which accompanies this distribution. The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +# > +#*/ > + > +[Defines] > + INF_VERSION = 0x0001001A > + BASE_NAME = SynQuacerGpioPei > + FILE_GUID = 55a981a5-f371-4ba3-93a5-37fa0ca95089 > + MODULE_TYPE = PEIM > + VERSION_STRING = 1.0 > + ENTRY_POINT = SynQuacerGpioPeiEntryPoint > + > +# > +# The following information is for reference only and not required by the build tools. > +# > +# VALID_ARCHITECTURES = AARCH64 > +# > +# > + > +[Sources] > + SynQuacerGpioPei.c > + > +[Packages] > + EmbeddedPkg/EmbeddedPkg.dec > + MdePkg/MdePkg.dec > + Silicon/Socionext/SynQuacer/SynQuacer.dec > + > +[LibraryClasses] > + IoLib > + PeimEntryPoint > + PeiServicesLib > + > +[Ppis] > + gEdkiiEmbeddedGpioPpiGuid ## PRODUCES > + > +[Depex] > + TRUE > -- > 2.11.0 >