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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: edk2-devel@lists.01.org, leif.lindholm@linaro.org
Cc: daniel.thompson@linaro.org, methavanitpong.pipat@socionext.com,
	masahisa.kojima@linaro.org, masami.hiramatsu@linaro.org,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH edk2-platforms v5 2/6] Silicon/SynQuacer: add DT description of the SDHCI controller
Date: Fri, 17 Nov 2017 19:04:19 +0000	[thread overview]
Message-ID: <20171117190423.19511-3-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <20171117190423.19511-1-ard.biesheuvel@linaro.org>

Describe the SynQuacer SoC's eMMC controller in DT so the OS can
attach to it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
v5: disable by default, and only enable for the evaluation board

 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi         | 27 ++++++++++++++++++++
 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts |  4 +++
 2 files changed, 31 insertions(+)

diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index e72db377bc39..5e663c59efbd 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -532,4 +532,31 @@
         #interrupt-cells = <3>;
         socionext,spi-base = <112>;
     };
+
+    clk_alw_b_0: bclk200 {
+        compatible = "fixed-clock";
+        #clock-cells = <0>;
+        clock-frequency = <200000000>;
+        clock-output-names = "sd_bclk";
+    };
+
+    clk_alw_c_0: sd4clk800 {
+        compatible = "fixed-clock";
+        #clock-cells = <0>;
+        clock-frequency = <800000000>;
+        clock-output-names = "sd_sd4clk";
+    };
+
+    sdhci: sdhci@52300000 {
+        compatible = "socionext,synquacer-sdhci", "fujitsu,mb86s70-sdhci-3.0";
+        reg = <0 0x52300000 0x0 0x1000>;
+        interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+        bus-width = <8>;
+        cap-mmc-highspeed;
+        fujitsu,cmd-dat-delay-select;
+        clocks = <&clk_alw_c_0 &clk_alw_b_0>;
+        clock-names = "core", "iface";
+        status = "disabled";
+    };
 };
diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
index 7de7db182b27..132fd370a71b 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
@@ -30,3 +30,7 @@
                       "NC",         "NC",         "PEC-PD26",     "PEC-PD27",
                       "PEC-PD28",   "PEC-PD29",   "PEC-PD30",     "PEC-PD31";
 };
+
+&sdhci {
+    status = "okay";
+};
-- 
2.11.0



  parent reply	other threads:[~2017-11-17 19:00 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-17 19:04 [PATCH edk2-platforms v5 0/6] add remaining support for Socionext SynQuacer Ard Biesheuvel
2017-11-17 19:04 ` [PATCH edk2-platforms v5 1/6] Silicon/SynQuacer: implement 'clear NVRAM' feature using a DIP switch Ard Biesheuvel
2017-11-25 12:17   ` Leif Lindholm
2017-11-17 19:04 ` Ard Biesheuvel [this message]
2017-11-17 19:04 ` [PATCH edk2-platforms v5 3/6] Silicon/Socionext: implement I2C master protocol for SynQuacer I2C Ard Biesheuvel
2017-11-17 19:04 ` [PATCH edk2-platforms v5 4/6] Silicon/NXP: add RTC support library for PCF8563 I2C IP Ard Biesheuvel
2017-11-17 19:04 ` [PATCH edk2-platforms v5 5/6] Platform/DeveloperBox: wire up RTC support Ard Biesheuvel
2017-11-17 19:04 ` [PATCH edk2-platforms v5 6/6] Platform/SynQuacerEvalBoard: add eMMC driver stack Ard Biesheuvel
2017-11-25 12:23 ` [PATCH edk2-platforms v5 0/6] add remaining support for Socionext SynQuacer Leif Lindholm
2017-11-26 10:30   ` Ard Biesheuvel

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