Re: [PATCH edk2-platforms] Silicon/SynQuacer: enable coherent DMA for NETSEC and eMMC

[Leif Lindholm <leif.lindholm@linaro.org>]

On Tue, Nov 28, 2017 at 01:37:20PM +0000, Ard Biesheuvel wrote:
> On 28 November 2017 at 13:28, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> > As it turns out, it is surprisingly easy to configure both the NETSEC
> > and eMMC devices as cache coherent for DMA, given that they are both
> > behind the same SMMU which is already configured in passthrough mode.

Configures in passthrough mode by edk2 or earlier firmware?

> > So update the static SMMU configuration to make memory accesses performed
> > by these devices inner shareable, inner/outer writeback cacheable, which
> > makes them cache coherent with the CPUs.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > ---
> >  Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc                              |  2 +-
> >  Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi                                     |  2 ++
> >  Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c                                    |  2 +-
> >  Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c                             | 23 ++++++++++++++++++++
> >  Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h                                  |  4 ++++
> >  Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c |  3 +++
> >  6 files changed, 34 insertions(+), 2 deletions(-)
> >
> > diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> > index 7245240012bc..dd4a7f9baf69 100644
> > --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> > +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> > @@ -597,7 +597,7 @@ [Components.common]
> >    NetworkPkg/HttpBootDxe/HttpBootDxe.inf
> >    Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.inf {
> >      <LibraryClasses>
> > -      DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf
> > +      DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf
> >    }
> >
> >    #
> 
> Note: this hunk ^^^ needs to be applied to DeveloperBox.dsc as well.

Do I wait for a v2 including that?

/
    Leif

> > diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> > index 7c791de213c7..c9fee5d1f350 100644
> > --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> > +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> > @@ -456,6 +456,7 @@
> >              max-speed = <1000>;
> >              max-frame-size = <9000>;
> >              phy-handle = <&ethphy0>;
> > +            dma-coherent;
> >
> >              #address-cells = <1>;
> >              #size-cells = <0>;
> > @@ -557,6 +558,7 @@
> >          fujitsu,cmd-dat-delay-select;
> >          clocks = <&clk_alw_c_0 &clk_alw_b_0>;
> >          clock-names = "core", "iface";
> > +        dma-coherent;
> >          status = "disabled";
> >      };
> >  };
> > diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c
> > index 9b1957e99907..1c38b3706f9d 100644
> > --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c
> > +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Emmc.c
> > @@ -185,7 +185,7 @@ RegisterEmmc (
> >
> >    Status = RegisterNonDiscoverableMmioDevice (
> >               NonDiscoverableDeviceTypeSdhci,
> > -             NonDiscoverableDeviceDmaTypeNonCoherent,
> > +             NonDiscoverableDeviceDmaTypeCoherent,
> >               NULL,
> >               &mSdMmcControllerHandle,
> >               1,
> > diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
> > index b28d05650bb5..acb3e0272d3f 100644
> > --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
> > +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
> > @@ -181,6 +181,27 @@ I2cEnumerate (
> >    return EFI_SUCCESS;
> >  }
> >
> > +#define SMMU_SCR0                         0x0
> > +#define SMMU_SCR0_SHCFG_INNER             (0x2 << 22)
> > +#define SMMU_SCR0_MTCFG                   (0x1 << 20)
> > +#define SMMU_SCR0_MEMATTR_INNER_OUTER_WB  (0xf << 16)
> > +
> > +STATIC
> > +VOID
> > +SmmuEnableCoherentDma (
> > +  VOID
> > +  )
> > +{
> > +  //
> > +  // The SCB SMMU (MMU-500) is shared between the NETSEC and eMMC devices, and
> > +  // is configured in passthrough mode by default. Let's set the global memory
> > +  // type override as well, so that all memory accesses by these devices are
> > +  // inner shareable inner/outer writeback cacheable.
> > +  //
> > +  MmioOr32 (SYNQUACER_SCB_SMMU_BASE + SMMU_SCR0,
> > +    SMMU_SCR0_SHCFG_INNER | SMMU_SCR0_MTCFG | SMMU_SCR0_MEMATTR_INNER_OUTER_WB);
> > +}
> > +
> >  STATIC
> >  EFI_STATUS
> >  EFIAPI
> > @@ -272,5 +293,7 @@ PlatformDxeEntryPoint (
> >                    NULL);
> >    ASSERT_EFI_ERROR (Status);
> >
> > +  SmmuEnableCoherentDma ();
> > +
> >    return EFI_SUCCESS;
> >  }
> > diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
> > index 3c7bd58866cc..f43adcc8607f 100644
> > --- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
> > +++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
> > @@ -65,4 +65,8 @@
> >  #define SYNQUACER_PCIE_BASE             0x58200000
> >  #define SYNQUACER_PCIE_SIZE             0x00200000
> >
> > +// SCB SMMU
> > +#define SYNQUACER_SCB_SMMU_BASE         0x52E00000
> > +#define SYNQUACER_SCB_SMMU_SIZE         SIZE_64KB
> > +
> >  #endif
> > diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
> > index a640b3e0c0d1..1402ecafce4a 100644
> > --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
> > +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
> > @@ -115,6 +115,9 @@ STATIC CONST ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] = {
> >                       FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize)),
> >    ARM_DEVICE_REGION (FixedPcdGet32 (PcdFlashNvStorageFtwSpareBase),
> >                       FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize)),
> > +
> > +  // NETSEC/eMMC SMMU
> > +  ARM_DEVICE_REGION (SYNQUACER_SCB_SMMU_BASE, SYNQUACER_SCB_SMMU_SIZE),
> >  };
> >
> >  STATIC
> > --
> > 2.11.0
> >