From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BE358220C1C5A for ; Thu, 30 Nov 2017 18:33:08 -0800 (PST) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Nov 2017 18:37:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,343,1508828400"; d="scan'208";a="8199510" Received: from jwang36-mobl2.ccr.corp.intel.com ([10.239.192.33]) by fmsmga004.fm.intel.com with ESMTP; 30 Nov 2017 18:37:33 -0800 From: Jian J Wang To: edk2-devel@lists.01.org Cc: Star Zeng , Eric Dong , Jiewen Yao Date: Fri, 1 Dec 2017 10:37:20 +0800 Message-Id: <20171201023728.4680-4-jian.j.wang@intel.com> X-Mailer: git-send-email 2.14.1.windows.1 In-Reply-To: <20171201023728.4680-1-jian.j.wang@intel.com> References: <20171201023728.4680-1-jian.j.wang@intel.com> Subject: [PATCH v3 03/11] MdeModulePkg/CpuExceptionHandlerLib.h: Add a new API InitializeCpuExceptionHandlersEx X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Dec 2017 02:33:09 -0000 > v3: > a. Change InitializeCpuExceptionStackSwitchHandlers() to > InitializeCpuExceptionHandlersEx() to be more general. > b. Add structure definition CPU_EXCEPTION_INIT_DATA_EX for new API > v2: > Add prototype definition of InitializeCpuExceptionStackSwitchHandlers() A new API InitializeCpuExceptionHandlersEx() is introduced to support initializing exception handlers with extra functionalities which need extra init data, such as stack switch for Stack Guard feature. EFI_STATUS EFIAPI InitializeCpuExceptionHandlersEx ( IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL, IN CPU_EXCEPTION_INIT_DATA_EX *InitDataEx OPTIONAL ); By default, this method should include all functionalities implemented by InitializeCpuExceptionHandlers(), plus extra initialization works, if any. This is could be done by calling InitializeCpuExceptionHandlers() directly in this method besides the extra works. InitDataEx is optional and its use and content are processor arch dependent. The typical usage of it is to convey resources which have to be reserved elsewhere and are necessary for the extra initialization of exception. Cc: Star Zeng Cc: Eric Dong Cc: Jiewen Yao Suggested-by: Ayellet Wolman Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- .../Include/Library/CpuExceptionHandlerLib.h | 78 ++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h index 6cd8230127..a513ec697c 100644 --- a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h +++ b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h @@ -19,6 +19,54 @@ #include #include +typedef union { + struct { + // + // The address of top of known good stack reserved for *ALL* exceptions + // needing switching stack. + // + UINTN KnownGoodStackTop; + // + // The size of known good stack for *ONE* exception only. + // + UINTN KnownGoodStackSize; + // + // Buffer of exception vector list for stack switch. + // + UINT8 *StackSwitchExceptions; + // + // Number of exception vectors in StackSwitchExceptions. + // + UINTN StackSwitchExceptionNumber; + // + // Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR. + // Normally there's no need to change IDT table size. + // + VOID *IdtTable; + // + // Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR. + // + VOID *GdtTable; + // + // Size of buffer GdtTable. + // + UINTN GdtSize; + // + // Pointer to start address of task gate descriptor in the GDT table. + // It must be type of IA32_TSS_DESCRIPTOR. + // + VOID *TssDesc; + // + // Buffer of task-state segment. It must be type of IA32_TASK_STATE_SEGMENT. + // + VOID *Tss; + // + // Flag to indicate if default handlers should be initialized or not. + // + BOOLEAN InitDefaultHandlers; + } Ia32; +} CPU_EXCEPTION_INIT_DATA_EX; + /** Initializes all CPU exceptions entries and provides the default exception handlers. @@ -41,6 +89,36 @@ InitializeCpuExceptionHandlers ( IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL ); +/** + Initializes all CPU exceptions entries with optional extra initializations. + + By default, this method should include all functionalities implemented by + InitializeCpuExceptionHandlers(), plus extra initialization works, if any. + This is could be done by calling InitializeCpuExceptionHandlers() directly + in this method besides the extra works. + + InitDataEx is optional and its use and content are processor arch dependent. + The typical usage of it is to convey resources which have to be reserved + elsewhere and are necessary for the extra initializations of exception. + + @param[in] VectorInfo Pointer to reserved vector list. + @param[in] InitDataEx Pointer to data optional for extra initializations + of exception. + + @retval EFI_SUCCESS The exceptions have been successfully + initialized. + @retval EFI_INVALID_PARAMETER VectorInfo or InitDataEx contains invalid + content. + @retval EFI_UNSUPPORTED This function is not supported. + +**/ +EFI_STATUS +EFIAPI +InitializeCpuExceptionHandlersEx ( + IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL, + IN CPU_EXCEPTION_INIT_DATA_EX *InitDataEx OPTIONAL + ); + /** Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers. -- 2.14.1.windows.1