From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.24; helo=mga09.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7E51D2218E944 for ; Wed, 6 Dec 2017 21:36:21 -0800 (PST) Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Dec 2017 21:40:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,371,1508828400"; d="scan'208";a="608955" Received: from jwang36-mobl2.ccr.corp.intel.com ([10.239.192.76]) by fmsmga008.fm.intel.com with ESMTP; 06 Dec 2017 21:40:53 -0800 From: Jian J Wang To: edk2-devel@lists.01.org Cc: Liming Gao , Michael D Kinney , Ruiyu Ni Date: Thu, 7 Dec 2017 13:40:47 +0800 Message-Id: <20171207054049.18140-2-jian.j.wang@intel.com> X-Mailer: git-send-email 2.15.1.windows.2 In-Reply-To: <20171207054049.18140-1-jian.j.wang@intel.com> References: <20171207054049.18140-1-jian.j.wang@intel.com> Subject: [PATCH v2 1/3] IntelFrameworkPkg/LegacyBios.h: Add a macro to guarantee page 0 access X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Dec 2017 05:36:21 -0000 > v2: > a. Fix a typo in expression in the macro ACCESS_PAGE0_CODE > b. Fix GCC49 build error ue to the introduction of NULL pointer detection feature, page 0 will be disabled if the feature is enabled, which will cause legacy code failed to update legacy data in page 0. This macro is introduced to make sure the page 0 is enabled before those code and restore the original status of it afterwards. Another reason to introduce this macro is to eliminate the dependency on the PcdNullPointerDetectionPropertyMask. Because this is a new PCD, it could cause some backward compatibility issue for some old packages. This macro will simply check if the page 0 is disabled or not. If it's disabled, it will enable it before code updating page 0 and disable it afterwards. Otherwise, this macro will do nothing to page 0. The usage of the macro will be look like (similar to DEBUG_CODE macro): ACCESS_PAGE0_CODE( ); Cc: Liming Gao Cc: Michael D Kinney Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- IntelFrameworkPkg/Include/Protocol/LegacyBios.h | 34 +++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h index 641f101bce..6a5f5464e7 100644 --- a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h +++ b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h @@ -1518,6 +1518,40 @@ struct _EFI_LEGACY_BIOS_PROTOCOL { EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice; }; +// +// Legacy BIOS needs to access memory in page 0 (0-4095), which is disabled if +// NULL pointer detection feature is enabled. Following macro can be used to +// enable/disable page 0 before/after accessing it. +// +#define ACCESS_PAGE0_CODE(statements) \ + do { \ + EFI_STATUS Status_; \ + EFI_GCD_MEMORY_SPACE_DESCRIPTOR Desc_; \ + \ + Desc_.Attributes = 0; \ + Status_ = gDS->GetMemorySpaceDescriptor (0, &Desc_); \ + ASSERT_EFI_ERROR (Status_); \ + if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \ + Status_ = gDS->SetMemorySpaceAttributes ( \ + 0, \ + EFI_PAGES_TO_SIZE(1), \ + Desc_.Attributes & ~(UINT64)EFI_MEMORY_RP \ + ); \ + ASSERT_EFI_ERROR (Status_); \ + } \ + \ + statements; \ + \ + if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \ + Status_ = gDS->SetMemorySpaceAttributes ( \ + 0, \ + EFI_PAGES_TO_SIZE(1), \ + Desc_.Attributes \ + ); \ + ASSERT_EFI_ERROR (Status_); \ + } \ + } while (FALSE) + extern EFI_GUID gEfiLegacyBiosProtocolGuid; #endif -- 2.15.1.windows.2