From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::22f; helo=mail-wm0-x22f.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x22f.google.com (mail-wm0-x22f.google.com [IPv6:2a00:1450:400c:c09::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5EE7A2214E329 for ; Mon, 11 Dec 2017 09:36:27 -0800 (PST) Received: by mail-wm0-x22f.google.com with SMTP id n138so16004045wmg.2 for ; Mon, 11 Dec 2017 09:41:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=uMGCNtl2EGaPnpC1d7UdYcz3T64rnJPqrRT78a/u+dQ=; b=E826M/8VxQq+En/bEB5SrbLoZhpaeFaQqsKveSDf/zHRrRWqesHroz7GK9ma1PJDk+ udiVa1qAiuSSrVtGnYrioCohuKrvdMKQXFvUOukRpn9d9W0S79/sOM6pJV5mKkcTDFI3 ofFe2aJ0PH+lE2ROU7cXonz0GDezjlNFTiBic= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=uMGCNtl2EGaPnpC1d7UdYcz3T64rnJPqrRT78a/u+dQ=; b=kuK6ZdwD26z+7p3RODufse2+6b+G8XbklhjHQ3Rcqwkzycr2tAQYPEr+t0IsfY20EV QPuztKCwP0+DxJTCN/l007571X6nA3F6Y5IP68vl3mH3TgEKWjcL7hnJ7xV8wFw0F9Ue h+fYZEXajXJbDBq3p2R/2taVXAHLBCUwmxZIDr8gvrm7loAWPxUpdwPnUvj9MMqdfr99 vy1rN0RwI6rqyCzcciGHarMqQ9A1BHZP0qEiR15Y9VLniuRe23oBZzMPadaRr0eeD+6n x7nJguRp6ApPfVKDbvFkByvgeVfb25xgDpDltl7V4z6dvPc5CWIfLLjnGtJdNVGrea19 127g== X-Gm-Message-State: AKGB3mJhSa76EUn1ozNMM7pedDW+kXONyG2GW+0hArXkwzP0oyoMzmU4 IkX4o7eiXvK/5poKYqblt/yGQA== X-Google-Smtp-Source: ACJfBotw3kzjOXLmOSrS1uS4W9vXjaQycmGwMQHFkM+nhYnmBkQ7LM2KnPVmEZMTeh1ReP7yMS4DQA== X-Received: by 10.28.88.137 with SMTP id m131mr1492498wmb.48.1513014063736; Mon, 11 Dec 2017 09:41:03 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id a22sm9445578wme.46.2017.12.11.09.41.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Dec 2017 09:41:02 -0800 (PST) Date: Mon, 11 Dec 2017 17:41:00 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, Girish Pathak , Evan Lloyd Message-ID: <20171211174100.te3wowfs72y3ectg@bivouac.eciton.net> References: <20171208173128.28485-1-ard.biesheuvel@linaro.org> <20171208173128.28485-4-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20171208173128.28485-4-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH v2 3/5] ArmPlatformPkg: implement LcdHwLib for HdLcd X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Dec 2017 17:36:27 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Dec 08, 2017 at 05:31:26PM +0000, Ard Biesheuvel wrote: > Convert the HdLcd specific code of LcdGraphicsOutputDxe into a LcdHwlib > implementation that we will wire up later into LcdGraphicsOutputDxe. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Girish Pathak > Signed-off-by: Evan Lloyd > Signed-off-by: Ard Biesheuvel Again, some whitespace an line length, but this (mostly) isn't new code. Reviewed-by: Leif Lindholm > --- > ArmPlatformPkg/Library/HdLcd/HdLcd.c | 158 ++++++++++++++++++++ > ArmPlatformPkg/Library/HdLcd/HdLcd.h | 89 +++++++++++ > ArmPlatformPkg/Library/HdLcd/HdLcd.inf | 42 ++++++ > 3 files changed, 289 insertions(+) > > diff --git a/ArmPlatformPkg/Library/HdLcd/HdLcd.c b/ArmPlatformPkg/Library/HdLcd/HdLcd.c > new file mode 100644 > index 000000000000..24efb68f23e3 > --- /dev/null > +++ b/ArmPlatformPkg/Library/HdLcd/HdLcd.c > @@ -0,0 +1,158 @@ > +/** @file Lcd.c > + > + Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
> + > + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the BSD License > + which accompanies this distribution. The full text of the license may be found at > + http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > + > +**/ > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "HdLcd.h" > + > +/********************************************************************** > + * > + * This file contains all the bits of the Lcd that are > + * platform independent. > + * > + **********************************************************************/ > + > +STATIC > +UINTN > +GetBytesPerPixel ( > + IN LCD_BPP Bpp > + ) > +{ > + switch(Bpp) { > + case LCD_BITS_PER_PIXEL_24: > + return 4; > + > + case LCD_BITS_PER_PIXEL_16_565: > + case LCD_BITS_PER_PIXEL_16_555: > + case LCD_BITS_PER_PIXEL_12_444: > + return 2; > + > + case LCD_BITS_PER_PIXEL_8: > + case LCD_BITS_PER_PIXEL_4: > + case LCD_BITS_PER_PIXEL_2: > + case LCD_BITS_PER_PIXEL_1: > + return 1; > + > + default: > + return 0; > + } > +} > + > +EFI_STATUS > +LcdInitialize ( > + IN EFI_PHYSICAL_ADDRESS VramBaseAddress > + ) > +{ > + // Disable the controller > + MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE); > + > + // Disable all interrupts > + MmioWrite32(HDLCD_REG_INT_MASK, 0); > + > + // Define start of the VRAM. This never changes for any graphics mode > + MmioWrite32(HDLCD_REG_FB_BASE, (UINT32) VramBaseAddress); > + > + // Setup various registers that never change > + MmioWrite32(HDLCD_REG_BUS_OPTIONS, (4 << 8) | HDLCD_BURST_8); > + MmioWrite32(HDLCD_REG_POLARITIES, HDLCD_PXCLK_LOW | HDLCD_DATA_HIGH | HDLCD_DATEN_HIGH | HDLCD_HSYNC_LOW | HDLCD_VSYNC_HIGH); > + MmioWrite32(HDLCD_REG_PIXEL_FORMAT, HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL); > + MmioWrite32(HDLCD_REG_RED_SELECT, (0 << 16 | 8 << 8 | 0)); > + MmioWrite32(HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 | 8)); > + MmioWrite32(HDLCD_REG_BLUE_SELECT, (0 << 16 | 8 << 8 | 16)); > + > + return EFI_SUCCESS; > +} > + > +EFI_STATUS > +LcdSetMode ( > + IN UINT32 ModeNumber > + ) > +{ > + EFI_STATUS Status; > + UINT32 HRes; > + UINT32 HSync; > + UINT32 HBackPorch; > + UINT32 HFrontPorch; > + UINT32 VRes; > + UINT32 VSync; > + UINT32 VBackPorch; > + UINT32 VFrontPorch; > + UINT32 BytesPerPixel; > + LCD_BPP LcdBpp; > + > + > + // Set the video mode timings and other relevant information > + Status = LcdPlatformGetTimings (ModeNumber, > + &HRes,&HSync,&HBackPorch,&HFrontPorch, > + &VRes,&VSync,&VBackPorch,&VFrontPorch); > + ASSERT_EFI_ERROR (Status); > + if (EFI_ERROR( Status )) { > + return EFI_DEVICE_ERROR; > + } > + > + Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp); > + ASSERT_EFI_ERROR (Status); > + if (EFI_ERROR( Status )) { > + return EFI_DEVICE_ERROR; > + } > + > + BytesPerPixel = GetBytesPerPixel(LcdBpp); > + > + // Disable the controller > + MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE); > + > + // Update the frame buffer information with the new settings > + MmioWrite32(HDLCD_REG_FB_LINE_LENGTH, HRes * BytesPerPixel); > + MmioWrite32(HDLCD_REG_FB_LINE_PITCH, HRes * BytesPerPixel); > + MmioWrite32(HDLCD_REG_FB_LINE_COUNT, VRes - 1); > + > + // Set the vertical timing information > + MmioWrite32(HDLCD_REG_V_SYNC, VSync); > + MmioWrite32(HDLCD_REG_V_BACK_PORCH, VBackPorch); > + MmioWrite32(HDLCD_REG_V_DATA, VRes - 1); > + MmioWrite32(HDLCD_REG_V_FRONT_PORCH, VFrontPorch); > + > + // Set the horizontal timing information > + MmioWrite32(HDLCD_REG_H_SYNC, HSync); > + MmioWrite32(HDLCD_REG_H_BACK_PORCH, HBackPorch); > + MmioWrite32(HDLCD_REG_H_DATA, HRes - 1); > + MmioWrite32(HDLCD_REG_H_FRONT_PORCH, HFrontPorch); > + > + // Enable the controller > + MmioWrite32(HDLCD_REG_COMMAND, HDLCD_ENABLE); > + > + return EFI_SUCCESS; > +} > + > +VOID > +LcdShutdown ( > + VOID > + ) > +{ > + // Disable the controller > + MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE); > +} > + > +EFI_STATUS > +LcdIdentify ( > + VOID > + ) > +{ > + return EFI_SUCCESS; > +} > diff --git a/ArmPlatformPkg/Library/HdLcd/HdLcd.h b/ArmPlatformPkg/Library/HdLcd/HdLcd.h > new file mode 100644 > index 000000000000..6df97a9dfee6 > --- /dev/null > +++ b/ArmPlatformPkg/Library/HdLcd/HdLcd.h > @@ -0,0 +1,89 @@ > +/** @file HDLcd.h > + > + Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
> + > + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the BSD License > + which accompanies this distribution. The full text of the license may be found at > + http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > + > + **/ > + > +#ifndef _HDLCD_H_ > +#define _HDLCD_H_ > + > +// > +// HDLCD Controller Register Offsets > +// > + > +#define HDLCD_REG_VERSION ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x000) > +#define HDLCD_REG_INT_RAWSTAT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x010) > +#define HDLCD_REG_INT_CLEAR ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x014) > +#define HDLCD_REG_INT_MASK ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x018) > +#define HDLCD_REG_INT_STATUS ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x01C) > +#define HDLCD_REG_FB_BASE ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x100) > +#define HDLCD_REG_FB_LINE_LENGTH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x104) > +#define HDLCD_REG_FB_LINE_COUNT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x108) > +#define HDLCD_REG_FB_LINE_PITCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x10C) > +#define HDLCD_REG_BUS_OPTIONS ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x110) > +#define HDLCD_REG_V_SYNC ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x200) > +#define HDLCD_REG_V_BACK_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x204) > +#define HDLCD_REG_V_DATA ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x208) > +#define HDLCD_REG_V_FRONT_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x20C) > +#define HDLCD_REG_H_SYNC ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x210) > +#define HDLCD_REG_H_BACK_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x214) > +#define HDLCD_REG_H_DATA ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x218) > +#define HDLCD_REG_H_FRONT_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x21C) > +#define HDLCD_REG_POLARITIES ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x220) > +#define HDLCD_REG_COMMAND ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x230) > +#define HDLCD_REG_PIXEL_FORMAT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x240) > +#define HDLCD_REG_RED_SELECT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x244) > +#define HDLCD_REG_GREEN_SELECT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x248) > +#define HDLCD_REG_BLUE_SELECT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x24C) > + > + > +// > +// HDLCD Values of registers > +// > + > +// HDLCD Interrupt mask, clear and status register > +#define HDLCD_DMA_END BIT0 /* DMA has finished reading a frame */ > +#define HDLCD_BUS_ERROR BIT1 /* DMA bus error */ > +#define HDLCD_SYNC BIT2 /* Vertical sync */ > +#define HDLCD_UNDERRUN BIT3 /* No Data available while DATAEN active */ > + > +// CLCD_CONTROL Control register > +#define HDLCD_DISABLE 0 > +#define HDLCD_ENABLE BIT0 > + > +// Bus Options > +#define HDLCD_BURST_1 BIT0 > +#define HDLCD_BURST_2 BIT1 > +#define HDLCD_BURST_4 BIT2 > +#define HDLCD_BURST_8 BIT3 > +#define HDLCD_BURST_16 BIT4 > + > +// Polarities - HIGH > +#define HDLCD_VSYNC_HIGH BIT0 > +#define HDLCD_HSYNC_HIGH BIT1 > +#define HDLCD_DATEN_HIGH BIT2 > +#define HDLCD_DATA_HIGH BIT3 > +#define HDLCD_PXCLK_HIGH BIT4 > +// Polarities - LOW (for completion and for ease of understanding the hardware settings) > +#define HDLCD_VSYNC_LOW 0 > +#define HDLCD_HSYNC_LOW 0 > +#define HDLCD_DATEN_LOW 0 > +#define HDLCD_DATA_LOW 0 > +#define HDLCD_PXCLK_LOW 0 > + > +// Pixel Format > +#define HDLCD_LITTLE_ENDIAN (0 << 31) > +#define HDLCD_BIG_ENDIAN (1 << 31) > + > +// Number of bytes per pixel > +#define HDLCD_4BYTES_PER_PIXEL ((4 - 1) << 3) > + > +#endif /* _HDLCD_H_ */ > diff --git a/ArmPlatformPkg/Library/HdLcd/HdLcd.inf b/ArmPlatformPkg/Library/HdLcd/HdLcd.inf > new file mode 100644 > index 000000000000..67aad05d210b > --- /dev/null > +++ b/ArmPlatformPkg/Library/HdLcd/HdLcd.inf > @@ -0,0 +1,42 @@ > +#/** @file > +# > +# Component description file for HDLCD module > +# > +# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
> +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of the BSD License > +# which accompanies this distribution. The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +# > +#**/ > + > +[Defines] > + INF_VERSION = 0x00010005 > + BASE_NAME = HdLcd > + FILE_GUID = ce660500-824d-11e0-ac72-0002a5d5c51b > + MODULE_TYPE = BASE > + VERSION_STRING = 1.0 > + LIBRARY_CLASS = LcdHwLib > + > +[Sources.common] > + HdLcd.c > + > +[Packages] > + ArmPlatformPkg/ArmPlatformPkg.dec > + ArmPkg/ArmPkg.dec > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + > +[LibraryClasses] > + ArmLib > + UefiLib > + BaseLib > + DebugLib > + IoLib > + > +[FixedPcd] > + gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase > -- > 2.11.0 >