Re: [PATCH] ArmPlatformPkg: retire obsolete PCDs

[Leif Lindholm <leif.lindholm@linaro.org>]

On Mon, Dec 11, 2017 at 05:57:09PM +0000, Ard Biesheuvel wrote:
> On 11 December 2017 at 15:42, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> > On Fri, Dec 08, 2017 at 06:27:32PM +0000, Ard Biesheuvel wrote:
> >> Retire a whole bunch of ArmPlatformPkg PCDs that are either related
> >> to the ARM BDS, to secure world execution or to stuff that has been
> >> migrated to edk2-platforms.
> >>
> >> Contributed-under: TianoCore Contribution Agreement 1.1
> >> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> >
> > Commenting out-of-order...
> > By the time we get to this, should we not also delete
> >   ## PL111 Lcd & HdLcd
> >   gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026
> >   gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027
> > ?
> >
> 
> Nope, as you just found out yourself.

Yes, so:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> 
> >> ---
> >>  ArmPlatformPkg/ArmPlatformPkg.dec | 41 --------------------
> >>  1 file changed, 41 deletions(-)
> >>
> >> diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec
> >> index b33b6e630d85..7cec775abeee 100644
> >> --- a/ArmPlatformPkg/ArmPlatformPkg.dec
> >> +++ b/ArmPlatformPkg/ArmPlatformPkg.dec
> >> @@ -45,13 +45,7 @@ [Guids.common]
> >>    #
> >>    gVariableRuntimeDxeFileGuid = { 0xcbd2e4d5, 0x7068, 0x4ff5, { 0xb4, 0x62, 0x98, 0x22, 0xb4, 0xad, 0x8d, 0x60 } }
> >>
> >> -  gArmBootMonFsFileInfoGuid   = { 0x41e26b9c, 0xada6, 0x45b3, { 0x80, 0x8e, 0x23, 0x57, 0xa3, 0x5b, 0x60, 0xd6 } }
> >> -
> >>  [PcdsFeatureFlag.common]
> >> -  # Set this PCD to TRUE to map NORFlash at 0x0. FALSE means the DRAM is mapped at 0x0.
> >> -  gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping|FALSE|BOOLEAN|0x00000012
> >> -
> >> -  gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE|BOOLEAN|0x00000001
> >>    gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004
> >>
> >>    gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C
> >> @@ -60,18 +54,10 @@ [PcdsFeatureFlag.common]
> >>    # we assume the OS will handle the FrameBuffer from the UEFI GOP information.
> >>    gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices|FALSE|BOOLEAN|0x0000003D
> >>
> >> -  # Enable Legacy Linux support in the BDS
> >> -  gArmPlatformTokenSpaceGuid.PcdBdsLinuxSupport|FALSE|BOOLEAN|0x0000002E
> >> -
> >>  [PcdsFixedAtBuild.common]
> >>    gArmPlatformTokenSpaceGuid.PcdCoreCount|1|UINT32|0x00000039
> >>    gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038
> >>
> >> -  # Stack for CPU Cores in Secure Mode
> >> -  gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0|UINT64|0x00000005
> >> -  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000|UINT32|0x00000036
> >> -  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000|UINT32|0x00000006
> >> -
> >>    # Stack for CPU Cores in Non Secure Mode
> >>    gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT64|0x00000009
> >>    gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037
> >> @@ -80,9 +66,6 @@ [PcdsFixedAtBuild.common]
> >>    # Size of the region used by UEFI in permanent memory (Reserved 128MB by default)
> >>    gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015
> >>
> >> -  # Boot Monitor FileSystem
> >> -  gArmPlatformTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L""|VOID*|0x0000003A
> >> -
> >>    #
> >>    # ARM Primecells
> >>    #
> >> @@ -114,33 +97,9 @@ [PcdsFixedAtBuild.common]
> >>    gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028
> >>    gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029
> >>
> >> -  #
> >> -  # BDS - Boot Manager
> >> -  #
> >> -  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Platform"|VOID*|0x00000019
> >> -  gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Default Boot Device"|VOID*|0x0000000C
> >> -  gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L""|VOID*|0x0000000D
> >> -  gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|L""|VOID*|0x000000F
> >> -
> >> -  gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L""|VOID*|0x0000001B
> >> -  gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L""|VOID*|0x0000001C
> >> -
> >>  [PcdsFixedAtBuild.common,PcdsDynamic.common]
> >>    ## PL031 RealTimeClock
> >>    gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024
> >>    gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy|300000000|UINT32|0x00000022
> >>
> >>    gArmPlatformTokenSpaceGuid.PcdWatchdogCount|0x0|UINT32|0x00000033
> >> -
> >> -[PcdsFixedAtBuild.ARM]
> >> -  # Stack for CPU Cores in Secure Monitor Mode
> >> -  gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT64|0x00000007
> >> -  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000|UINT32|0x00000008
> >> -
> >> -[PcdsFixedAtBuild.AARCH64]
> >> -  # The Secure World is only running in EL3. Only one set of stacks is needed for AArch64.
> >> -  # The Secure stacks are described by PcdCPUCoresSecStackBase, PcdCPUCoreSecPrimaryStackSize
> >> -  # and PcdCPUCoreSecSecondaryStackSize
> >> -  gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT64|0x00000007
> >> -  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x0|UINT32|0x00000008
> >> -
> >> --
> >> 2.11.0
> >>