From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D51AD221ED767 for ; Wed, 20 Dec 2017 21:03:17 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Dec 2017 21:08:05 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,434,1508828400"; d="scan'208";a="188848746" Received: from jwang36-mobl2.ccr.corp.intel.com ([10.239.193.35]) by fmsmga006.fm.intel.com with ESMTP; 20 Dec 2017 21:08:04 -0800 From: Jian J Wang To: edk2-devel@lists.01.org Cc: Star Zeng , Eric Dong Date: Thu, 21 Dec 2017 13:08:02 +0800 Message-Id: <20171221050802.15648-1-jian.j.wang@intel.com> X-Mailer: git-send-email 2.15.1.windows.2 Subject: [PATCH] MdeModulePkg/MdeModulePkg.dec: Clarify usage of PcdHeapGuardPropertyMask X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Dec 2017 05:03:18 -0000 Cc: Star Zeng Cc: Eric Dong Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- MdeModulePkg/MdeModulePkg.dec | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 8efad57766..d134ec798a 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -939,13 +939,17 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPoolType|0x0|UINT64|0x30001053 ## This mask is to control Heap Guard behavior. + # Note that due to the limit in pool memory implementation and the alignment + # requirement of UEFI spec, BIT7 is a try-best setting which cannot guarantee + # that the returned pool is exactly adjacent to head guard page or tail guard + # page. # BIT0 - Enable UEFI page guard.
# BIT1 - Enable UEFI pool guard.
# BIT2 - Enable SMM page guard.
# BIT3 - Enable SMM pool guard.
# BIT7 - The direction of Guard Page for Pool Guard. - # 0 - The returned pool is adjacent to the bottom guard page.
- # 1 - The returned pool is adjacent to the top guard page.
+ # 0 - The returned pool is near the tail guard page.
+ # 1 - The returned pool is near the head guard page.
# @Prompt The Heap Guard feature mask gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask|0x0|UINT8|0x30001054 -- 2.15.1.windows.2