From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::244; helo=mail-wr0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x244.google.com (mail-wr0-x244.google.com [IPv6:2a00:1450:400c:c0c::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 106A521CB87DD for ; Wed, 27 Dec 2017 07:45:23 -0800 (PST) Received: by mail-wr0-x244.google.com with SMTP id g17so27804578wrd.13 for ; Wed, 27 Dec 2017 07:50:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KD0d8WFpK7lu5CpOnB36A4OmThKNNcOm2YfqjLjgaVo=; b=ZZwhkn2O0VpmdlLNh4x4KbZXUFbrX5zmWnlYfJEF4m4tJCbz5KihYicvWwpVBgnZwe 1d5DGfSnhr5uJeugKIlODoQzxOulf5T+IUonpZU3IBJaLbvwqTgRT1U+yclFUcgjjUTb DXdomU8nB4AG523gTP0dkSjPe1ZtyMaCOLPjs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KD0d8WFpK7lu5CpOnB36A4OmThKNNcOm2YfqjLjgaVo=; b=EKbx6+Jf37D0YN35KM9i5WNBuWIGSOKgtOTZS9w9+ES0DBYnltwd7EbdzcNhYUHsXE zezgaR7NlzwebHlt36JkDi2Gi7QH4wvjHri1PLjslkKQve3T3TNSYZJPEh/2s31tr7Z3 MV7VENfTOIVBosw3RcK5E+xOC8xdy34q3Sr/mBBL8U0qDA4J953Yc0wc4bGD2+AcUM0z 01gis2fE4Xr255OYcVEPMP5+VDKjzxILAZp6thGfaATZLe1n6tty6paZ90/IOylF93tl TJMPOgfnK/JeBFE9SxRImQ9/xLC+ISAv9MRD+2A8u+cB60GV8bA8hOFqlplMjtYq0suV dIKQ== X-Gm-Message-State: AKGB3mLPOS8kAx3uJckk3IVcUnlw9aIIGkhevkb3iosv2izTU1kq5on1 6EmZVIVEJ2GFH2qq5z+jGk1Oa+uq+ho= X-Google-Smtp-Source: ACJfBou/WLxPOF0TLPav5quEwvprpa83s2b15sdGyQhqLhNdTE+53R7jlXr7eiMtqR8I1SjKPmUqBg== X-Received: by 10.223.135.39 with SMTP id a36mr13397044wra.50.1514389817224; Wed, 27 Dec 2017 07:50:17 -0800 (PST) Received: from localhost.localdomain ([105.137.110.132]) by smtp.gmail.com with ESMTPSA id i17sm20840876wrf.71.2017.12.27.07.50.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 27 Dec 2017 07:50:16 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, Ard Biesheuvel Date: Wed, 27 Dec 2017 15:49:59 +0000 Message-Id: <20171227155001.25886-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171227155001.25886-1-ard.biesheuvel@linaro.org> References: <20171227155001.25886-1-ard.biesheuvel@linaro.org> Subject: [PATCH edk2-platforms 4/6] Silicon/SynQuacer: load I2C driver before platform DXE driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Dec 2017 15:45:23 -0000 To ensure that the I2C master protocol is installed immediately onto the handles created by PlatformDxe in its entry point, force the SynQuacerI2cDxe driver to be loaded before PlatformDxe. These handles are recursively connected by the DXE core as soon as they appear, and so ensuring that the I2C master protocol driver is available at this time will ensure that these handles will be connected to it right away. This is useful when implementations of architectural protocols such as RTC or the EFI variable store, which should become available long before the ordinary dispatch of UEFI driver model drivers is started at the end of DXE, are based on I2C. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 +- Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf | 2 +- Silicon/Socionext/SynQuacer/SynQuacer.dec | 2 ++ 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf index 9778574be1bf..587dc111e75b 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf @@ -17,7 +17,7 @@ [Defines] INF_VERSION = 0x0001001A BASE_NAME = PlatformDxe - FILE_GUID = ac422cc1-d916-489a-b165-536fdfc633c2 + FILE_GUID = ac422cc1-d916-489a-b165-536fdfc633c2 # gSynQuacerPlatformDxeFileGuid MODULE_TYPE = DXE_DRIVER VERSION_STRING = 1.0 ENTRY_POINT = PlatformDxeEntryPoint diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf index fa715366878c..325816ba0b88 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf @@ -56,4 +56,4 @@ [FixedPcd] gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock [Depex] - TRUE + BEFORE gSynQuacerPlatformDxeFileGuid diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec index a21f12b5bc32..76529e3c2164 100644 --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -25,6 +25,8 @@ [Guids] gSynQuacerNonDiscoverableI2cMasterGuid = { 0x364ee675, 0x9e44, 0x42b7, { 0xa5, 0xe4, 0x92, 0x84, 0xdb, 0x85, 0xda, 0x09 } } gSynQuacerNonDiscoverableRuntimeI2cMasterGuid = { 0x5f35aa9b, 0x8c6f, 0x4828, { 0xbd, 0x44, 0x7c, 0xc0, 0xeb, 0x2d, 0xfe, 0xb9 } } + gSynQuacerPlatformDxeFileGuid = { 0xac422cc1, 0xd916, 0x489a, { 0xb1, 0x65, 0x53, 0x6f, 0xdf, 0xc6, 0x33, 0xc2 } } + [Ppis] gSynQuacerDramInfoPpiGuid = { 0x3e1d7356, 0xdda4, 0x4b1a, { 0x93, 0x46, 0xbf, 0x89, 0x1c, 0x86, 0x46, 0xcc } } -- 2.11.0