[PATCH edk2-platforms 6/6] Silicon/SynQuacer/DeviceTree: update NETSEC DT node to latest binding

[Ard Biesheuvel <ard.biesheuvel@linaro.org>]

The upstream version of the Linux NETSEC driver expects the PHY DT
node to appear under a MDIO subnode, so fix this in the device tree.
Fix the node name as well, this should be 'ethernet' not 'netsec'

Also, move the PHY subnode into the per-platform .dts file so we can
set the unit address in the node name. This is necessary because recent
versions of the DT compiler are more finicky about this.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts       |  7 +++++
 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi         | 29 +++++++++-----------
 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts |  7 +++++
 3 files changed, 27 insertions(+), 16 deletions(-)

diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
index d2cd7ef90e6f..77b7b1b118a6 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
@@ -44,3 +44,10 @@
                       "GPIO-K",     "GPIO-L",     "PEC-PD26",     "PEC-PD27",
                       "PEC-PD28",   "PEC-PD29",   "PEC-PD30",     "PEC-PD31";
 };
+
+&mdio_netsec {
+    phy_netsec: ethernet-phy@7 {
+        compatible = "ethernet-phy-ieee802.3-c22";
+        reg = <7>;
+    };
+};
diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index 7c3518facb98..8817ec0f150e 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -457,25 +457,22 @@
         #clock-cells = <0>;
     };
 
-    eth0: netsec@522D0000 {
-            compatible = "socionext,synquacer-netsec";
-            reg = <0 0x522d0000 0x0 0x10000>,
-                  <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>;
-            interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
-            clocks = <&clk_netsec>;
-            phy-mode = "rgmii";
-            max-speed = <1000>;
-            max-frame-size = <9000>;
-            phy-handle = <&ethphy0>;
-            dma-coherent;
+    ethernet@522D0000 {
+        compatible = "socionext,synquacer-netsec";
+        reg = <0 0x522d0000 0x0 0x10000>,
+              <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>;
+        interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&clk_netsec>;
+        phy-mode = "rgmii";
+        max-speed = <1000>;
+        max-frame-size = <9000>;
+        phy-handle = <&phy_netsec>;
+        dma-coherent;
 
+        mdio_netsec: mdio {
             #address-cells = <1>;
             #size-cells = <0>;
-
-            ethphy0: ethernet-phy {
-                    compatible = "ethernet-phy-ieee802.3-c22";
-                    reg = <FixedPcdGet32 (PcdNetsecPhyAddress)>;
-            };
+        };
     };
 
     smmu: iommu@582c0000 {
diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
index 132fd370a71b..5873e415c246 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
@@ -34,3 +34,10 @@
 &sdhci {
     status = "okay";
 };
+
+&mdio_netsec {
+    phy_netsec: ethernet-phy@1 {
+        compatible = "ethernet-phy-ieee802.3-c22";
+        reg = <1>;
+    };
+};
-- 
2.11.0