From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 834F4222A54D4 for ; Sun, 7 Jan 2018 21:35:25 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Jan 2018 21:40:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,329,1511856000"; d="scan'208";a="17485298" Received: from jwang36-mobl2.ccr.corp.intel.com ([10.239.192.52]) by FMSMGA003.fm.intel.com with ESMTP; 07 Jan 2018 21:40:34 -0800 From: Jian J Wang To: edk2-devel@lists.01.org Cc: Jiewen Yao , Eric Dong , Laszlo Ersek Date: Mon, 8 Jan 2018 13:39:58 +0800 Message-Id: <20180108053958.11988-3-jian.j.wang@intel.com> X-Mailer: git-send-email 2.15.1.windows.2 In-Reply-To: <20180108053958.11988-1-jian.j.wang@intel.com> References: <20180108053958.11988-1-jian.j.wang@intel.com> Subject: [PATCH v3 2/2] UefiCpuPkg/MpInitLib: fix wrong address set as Stack Guard for APs X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Jan 2018 05:35:26 -0000 > v3 changes: > a. Split the patch into two patch files. > b. Pass MpServiceProtocol test cases in PI SCT. > v2 changes: > a. Use each AP's ApTopOfStack to get the stack base address instead of > cpu0's ApTopOfStack which is actually set incorrectly before. > b. Fix cpu0's ApTopOfStack initialization. > c. Fix wrong debug print format. The reason is that DXE part initialization will reuse the stack allocated at PEI phase, if MP was initialized before. Some code added to check this situation and use stack base address saved in HOB passed from PEI. Cc: Jiewen Yao Cc: Eric Dong Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c index 40c1bf407a..e832c16eca 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c @@ -295,6 +295,7 @@ InitMpGlobalData ( UINTN Index; EFI_GCD_MEMORY_SPACE_DESCRIPTOR MemDesc; UINTN StackBase; + CPU_INFO_IN_HOB *CpuInfoInHob; SaveCpuMpData (CpuMpData); @@ -314,8 +315,21 @@ InitMpGlobalData ( ASSERT (FALSE); } + // + // DXE will reuse stack allocated for APs at PEI phase if it's available. + // Let's check it here. + // + // Note: BSP's stack guard is set at DxeIpl phase. But for the sake of + // BSP/AP exchange, stack guard for ApTopOfStack of cpu 0 will still be + // set here. + // + CpuInfoInHob = (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob; for (Index = 0; Index < CpuMpData->CpuCount; ++Index) { - StackBase = CpuMpData->Buffer + Index * CpuMpData->CpuApStackSize; + if (CpuInfoInHob != NULL && CpuInfoInHob[Index].ApTopOfStack != 0) { + StackBase = CpuInfoInHob[Index].ApTopOfStack - CpuMpData->CpuApStackSize; + } else { + StackBase = CpuMpData->Buffer + Index * CpuMpData->CpuApStackSize; + } Status = gDS->GetMemorySpaceDescriptor (StackBase, &MemDesc); ASSERT_EFI_ERROR (Status); @@ -326,6 +340,9 @@ InitMpGlobalData ( MemDesc.Attributes | EFI_MEMORY_RP ); ASSERT_EFI_ERROR (Status); + + DEBUG ((DEBUG_INFO, "Stack Guard set at %lx [cpu%lu]!\n", + (UINT64)StackBase, (UINT64)Index)); } } -- 2.15.1.windows.2