From: Liming Gao <liming.gao@intel.com>
To: edk2-devel@lists.01.org
Cc: Andrew Fish <afish@apple.com>, Jiewen Yao <jiewen.yao@intel.com>,
Eric Dong <eric.dong@intel.com>, Laszlo Ersek <lersek@redhat.com>,
Michael Kinney <michael.d.kinney@intel.com>
Subject: [Patch 5/7] UefiCpuPkg: Update SmmCpuFeatureLib pass XCODE5 tool chain
Date: Wed, 10 Jan 2018 23:24:30 +0800 [thread overview]
Message-ID: <20180110152432.15964-6-liming.gao@intel.com> (raw)
In-Reply-To: <20180110152432.15964-1-liming.gao@intel.com>
1. Use lea instruction to get the address instead of mov instruction.
2. Use the dummy address as jmp destination, and add the logic to fix up
the address to the absolute address at boot time.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
---
.../Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm | 6 +++-
UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c | 8 +++--
UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h | 11 +++++-
.../Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm | 42 +++++++++++++++-------
.../SmmCpuFeaturesLib/X64/SmiException.nasm | 10 +++---
5 files changed, 55 insertions(+), 22 deletions(-)
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
index 00c0f0672c..057ec6d105 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
@@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ;
-; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -273,3 +273,7 @@ _StmSmiHandler:
ASM_PFX(gcStmSmiHandlerSize) : DW $ - _StmSmiEntryPoint
ASM_PFX(gcStmSmiHandlerOffset) : DW _StmSmiHandler - _StmSmiEntryPoint
+
+global ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress)
+ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress):
+ ret
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
index 45015b8da4..8dc2d70527 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
@@ -1,7 +1,7 @@
/** @file
SMM STM support functions
- Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -116,7 +116,6 @@ UINTN mMsegSize = 0;
BOOLEAN mStmConfigurationTableInitialized = FALSE;
-
/**
The constructor function
@@ -139,6 +138,11 @@ SmmCpuFeaturesLibStmConstructor (
EFI_SMRAM_DESCRIPTOR *SmramDescriptor;
//
+ // Initialize address fixup
+ //
+ SmmCpuFeaturesLibStmSmiEntryFixupAddress ();
+
+ //
// Call the common constructor function
//
Status = SmmCpuFeaturesLibConstructor (ImageHandle, SystemTable);
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
index 92a4dc00eb..c98b660ecb 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
@@ -1,7 +1,7 @@
/** @file
SMM STM support
- Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -173,4 +173,13 @@ GetStmResource (
VOID
);
+/**
+ This function fixes up the address of the global variable or function
+ referred in SmiEntry assembly files to be the absoute address.
+**/
+VOID
+EFIAPI
+SmmCpuFeaturesLibStmSmiEntryFixupAddress (
+ );
+
#endif
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
index ea2d2970bd..e9c1306265 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
@@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ;
-; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -164,7 +164,9 @@ Base:
mov cr0, rbx
retf
@LongMode: ; long mode (64-bit code) starts here
- mov rax, ASM_PFX(gStmSmiHandlerIdtr)
+ db 0x48, 0xB8
+StmSmiEntrySmiHandlerIdtrAbsAddr:
+ dq 0 ; mov rax, ASM_PFX(gStmSmiHandlerIdtr)
lidt [rax]
lea ebx, [rdi + DSC_OFFSET]
mov ax, [rbx + DSC_DS]
@@ -175,7 +177,10 @@ Base:
mov gs, eax
mov ax, [rbx + DSC_SS]
mov ss, eax
-
+ db 0x48, 0xB8
+StmSmiEntryCommonHandlerAbsAddr:
+ dq 0 ; mov rax, CommonHandler
+ jmp rax
CommonHandler:
mov rbx, [rsp + 0x08] ; rbx <- CpuIndex
@@ -188,16 +193,13 @@ CommonHandler:
add rsp, -0x20
mov rcx, rbx
- mov rax, ASM_PFX(CpuSmmDebugEntry)
- call rax
+ call ASM_PFX(CpuSmmDebugEntry)
mov rcx, rbx
- mov rax, ASM_PFX(SmiRendezvous) ; rax <- absolute addr of SmiRedezvous
- call rax
+ call ASM_PFX(SmiRendezvous)
mov rcx, rbx
- mov rax, ASM_PFX(CpuSmmDebugExit)
- call rax
+ call ASM_PFX(CpuSmmDebugExit)
add rsp, 0x20
@@ -208,7 +210,7 @@ CommonHandler:
add rsp, 0x200
- mov rax, ASM_PFX(gStmXdSupported)
+ lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax]
cmp al, 0
jz .1
@@ -228,7 +230,7 @@ _StmSmiHandler:
; Check XD disable bit
;
xor r8, r8
- mov rax, ASM_PFX(gStmXdSupported)
+ lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax]
cmp al, 0
jz @StmXdDone
@@ -249,8 +251,9 @@ _StmSmiHandler:
; below step is needed, because STM does not run above code.
; we have to run below code to set IDT/CR0/CR4
-
- mov rax, ASM_PFX(gStmSmiHandlerIdtr)
+ db 0x48, 0xB8
+StmSmiHandlerIdtrAbsAddr:
+ dq 0 ; mov rax, ASM_PFX(gStmSmiHandlerIdtr)
lidt [rax]
mov rax, cr0
@@ -264,3 +267,16 @@ _StmSmiHandler:
ASM_PFX(gcStmSmiHandlerSize) : DW $ - _StmSmiEntryPoint
ASM_PFX(gcStmSmiHandlerOffset) : DW _StmSmiHandler - _StmSmiEntryPoint
+
+global ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress)
+ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress):
+ lea rax, [ASM_PFX(gStmSmiHandlerIdtr)]
+ lea rcx, [StmSmiEntrySmiHandlerIdtrAbsAddr]
+ mov qword [rcx], rax
+ lea rcx, [StmSmiHandlerIdtrAbsAddr]
+ mov qword [rcx], rax
+
+ lea rax, [CommonHandler]
+ lea rcx, [StmSmiEntryCommonHandlerAbsAddr]
+ mov qword [rcx], rax
+ ret
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
index ce9d7c2bb6..b0ab87b0d4 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
@@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ;
-; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -95,7 +95,7 @@ ASM_PFX(OnStmSetup):
; Check XD disable bit
;
xor r8, r8
- mov rax, ASM_PFX(gStmXdSupported)
+ lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax]
cmp al, 0
jz @StmXdDone1
@@ -118,7 +118,7 @@ ASM_PFX(OnStmSetup):
call ASM_PFX(SmmStmSetup)
add rsp, 0x20
- mov rax, ASM_PFX(gStmXdSupported)
+ lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax]
cmp al, 0
jz .11
@@ -139,7 +139,7 @@ ASM_PFX(OnStmTeardown):
; Check XD disable bit
;
xor r8, r8
- mov rax, ASM_PFX(gStmXdSupported)
+ lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax]
cmp al, 0
jz @StmXdDone2
@@ -162,7 +162,7 @@ ASM_PFX(OnStmTeardown):
call ASM_PFX(SmmStmTeardown)
add rsp, 0x20
- mov rax, ASM_PFX(gStmXdSupported)
+ lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax]
cmp al, 0
jz .12
--
2.11.0.windows.1
next prev parent reply other threads:[~2018-01-10 15:21 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-10 15:24 [Patch 0/7] EDK2: Enable XCODE5 tool chain with NASM source Liming Gao
2018-01-10 15:24 ` [Patch 1/7] BaseTools: Disable -Wno-unused-const-variable in XCODE5 RELEASE target Liming Gao
2018-01-16 8:22 ` Zhu, Yonghong
2018-01-10 15:24 ` [Patch 2/7] BaseTools: Use nasm as the preferred assembly source files for XCODE5 tool Liming Gao
2018-01-16 8:24 ` Zhu, Yonghong
2018-01-10 15:24 ` [Patch 3/7] MdeModulePkg: Update DebugSupportDxe to pass XCODE5 build Liming Gao
2018-01-11 2:31 ` Zeng, Star
2018-01-10 15:24 ` [Patch 4/7] UefiCpuPkg: Update CpuExceptionHandlerLib pass XCODE5 tool chain Liming Gao
2018-01-10 19:21 ` Kinney, Michael D
2018-01-10 21:57 ` Kinney, Michael D
2018-01-11 2:21 ` Gao, Liming
2018-01-10 15:24 ` Liming Gao [this message]
2018-01-10 15:24 ` [Patch 6/7] UefiCpuPkg: Update PiSmmCpuDxeSmm " Liming Gao
2018-01-10 15:24 ` [Patch 7/7] OvmfPkg: Don't add -mno-mmx -mno-sse option for " Liming Gao
2018-01-10 18:22 ` Laszlo Ersek
2018-01-11 9:54 ` [Patch 0/7] EDK2: Enable XCODE5 tool chain with NASM source Laszlo Ersek
2018-01-11 10:02 ` Laszlo Ersek
2018-01-12 2:15 ` Gao, Liming
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