From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::243; helo=mail-wr0-x243.google.com; envelope-from=sigmaepsilon92@gmail.com; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x243.google.com (mail-wr0-x243.google.com [IPv6:2a00:1450:400c:c0c::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EE66421D2BEE8 for ; Fri, 12 Jan 2018 22:47:33 -0800 (PST) Received: by mail-wr0-x243.google.com with SMTP id w50so7099755wrc.11 for ; Fri, 12 Jan 2018 22:52:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=yeIMBkS8pHFIfq5Gw1HQNNtnp0xi/TBE5PcAByGwBD4=; b=ImBWPCi3T1UOHrnY1TrdsemA4/HD9k0lWeAWpmzcngeYTJVij4GgFaBZbam6c6vtFz N0j0di1vFtBDVOlVgc4WoQK2+VNdeCt1SxhennDu2xi1aNGg7kqcuh1QgzFlklBjccW1 lqJgvEK9qRTzHa+5TH7kCim+NMr02FG85sCI/mlV+zxfQrCDOuDvSPM92w8DTJ4hFQE3 aq+HDVpl9a+B41m57Yv9q44+HiVQpcEHFa+CLcOf6Z6AmqbJnMu6zMxP54N6uCtNWoOC VJUPx5Xp7LjHSZkx2MVynb9oeG0Ag8b9AvVqrTs+IEmJsONbiffB0LXB8qudrQH9D4cM Bzmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=yeIMBkS8pHFIfq5Gw1HQNNtnp0xi/TBE5PcAByGwBD4=; b=qOr+t4ZnkEGIBCfdDAQtG1c/1Dl3w8yj7VyrPev+aBWg/xm4dlOXekrk2Eg+hkOnsm xGe7c0Qdjz+MQ72M2q1OBhowrkzIIlBTxRjcYPI/mSJk3cW/Oiad8HUA+EEd3krS1JEp ljAWRfCrbMhlpNAkpEWqxRASrT7HFLHRbcew3KnDYXnzTFivOqUu+NlWkkMo5WbQ7/6r exAd5ElcjHyUcDKJxcnYNbC2fopach51PHTJbuqvpwv7FDiN/5sObsAjexQnZ+4XoPeo rDflNsSfv++XG50G/8ADRYdgx+/m+obw2QpiNE+eIXv9HLAScxI+MjGDGMofypbjK47j janA== X-Gm-Message-State: AKwxytfkx0B11EQYkuRBXgnLIrgYluF4MBBfdMrYGUfCkm/OVAchtcYE 9MdLcWFfP11flBQtn0lXRXO4pJGK X-Google-Smtp-Source: ACJfBouJHsDHp/YbqTWXcm+KTzFtiIPovI4Psqgw1D8eEOt5JIRmvwbCy4XlXNsaZ/4Bf5oCV8O2VA== X-Received: by 10.223.138.247 with SMTP id z52mr7283569wrz.254.1515826367278; Fri, 12 Jan 2018 22:52:47 -0800 (PST) Received: from localhost.localdomain ([2a02:908:5a9:8400:5ec8:3210:9b68:c91c]) by smtp.gmail.com with ESMTPSA id h4sm23485965wrh.40.2018.01.12.22.52.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 Jan 2018 22:52:46 -0800 (PST) From: Michael Zimmermann To: edk2-devel@lists.01.org Cc: Leif Lindholm , Ard Biesheuvel Date: Sat, 13 Jan 2018 07:52:45 +0100 Message-Id: <20180113065245.10711-1-sigmaepsilon92@gmail.com> X-Mailer: git-send-email 2.15.1 Subject: [PATCH v2] ArmPkg/Library/ArmLib: add ArmWriteSctlr X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 13 Jan 2018 06:47:34 -0000 This currently isn't needed by anything in the edk2 tree but it's useful for externally maintained platforms which have to set this register e.g. to disable alignment aborts. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael Zimmermann --- ArmPkg/Include/Library/ArmLib.h | 6 ++++++ ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S | 9 +++++++++ ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S | 4 ++++ ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm | 3 +++ 4 files changed, 22 insertions(+) diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index 24e84c7a1965..ffda50e9d767 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -558,6 +558,12 @@ ArmReadSctlr ( VOID ); +VOID +EFIAPI +ArmWriteSctlr ( + IN UINT32 Value + ); + UINTN EFIAPI ArmReadHVBar ( diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S index 9d3dd66b10eb..1ef2f61f5979 100644 --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S @@ -187,4 +187,13 @@ ASM_FUNC(ArmReadSctlr) 3:mrs x0, sctlr_el3 4:ret +ASM_FUNC(ArmWriteSctlr) + EL1_OR_EL2_OR_EL3(x1) +1:msr sctlr_el1, x0 + ret +2:msr sctlr_el2, x0 + ret +3:msr sctlr_el3, x0 +4:ret + ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S index a0b5ed500298..149b57e059ee 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S @@ -153,6 +153,10 @@ ASM_FUNC(ArmReadSctlr) mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data) bx lr +ASM_FUNC(ArmWriteSctlr) + mcr p15, 0, r0, c1, c0, 0 + bx lr + ASM_FUNC(ArmReadCpuActlr) mrc p15, 0, r0, c1, c0, 1 bx lr diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm index 85b0feee20d4..219140c22b13 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm @@ -155,6 +155,9 @@ mrc p15, 0, r0, c1, c0, 0 // Read SCTLR into R0 (Read control register configuration data) bx lr + RVCT_ASM_EXPORT ArmWriteSctlr + mcr p15, 0, r0, c1, c0, 0 + bx lr RVCT_ASM_EXPORT ArmReadCpuActlr mrc p15, 0, r0, c1, c0, 1 -- 2.15.1