From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::236; helo=mail-wm0-x236.google.com; envelope-from=graeme.gregory@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x236.google.com (mail-wm0-x236.google.com [IPv6:2a00:1450:400c:c09::236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0B554222A3371 for ; Wed, 24 Jan 2018 05:43:44 -0800 (PST) Received: by mail-wm0-x236.google.com with SMTP id t74so8648880wme.3 for ; Wed, 24 Jan 2018 05:49:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=Bi1lOepuvZq7afuPacQEyj3amJGzjBHtuXvHZEv/Z80=; b=NMYgE6SywUKm0fWCAlEwVGz72gD2dGepvgfqoQXNsrmVDnSQKUw7Oh8B7ra/otiXkY LCIPFjW8ovT+k/ujGdWLtCO1KEVPWLZxbidm2v4LZMXqmCfCmXi2HFBH+ttkOSg1j4Bh 6+MLCbKlDsXiBPirBC+H3qjNn+F3qI2EaPjbA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=Bi1lOepuvZq7afuPacQEyj3amJGzjBHtuXvHZEv/Z80=; b=nBovZP1TmkOX0cBhp3M4T6iejr58umvpQ1AZLybJWhWt6F4F64yzd0N5YHJEPhwaV0 waxd6qG2dRCNr4R7hi3/dMI3u4bkmHhmEl3F/273Fn/5M+MyFz7pAQHRHyQJq3wHOh18 j4MukKSErW99RTbcZvdxvTrbOrWvD5J/+D/n2s6j4BmB3EBwMw5R8ih/TleOzPuDmTPb U+pnSkVWLCuTscvPWYs4xdMsAnI3GZi2Kxn+ben9v7YRJwEnN1dYXN2LTkW/oa2yEx68 dg9csB8FwddRfPrPZTjvfdcAN8TAEzqQFeGQq5I2Z6tAVy3yj0G0eIcN2FsOnx1AHG4C SRKQ== X-Gm-Message-State: AKwxytfJ2lw5zyfBNitb0lal1gELFmGswkDspYGxgNtpfutKUZxnvYEG TsHtE6nQhH5KGFBsPLIcMjGgEQ== X-Google-Smtp-Source: AH8x2260LGWkfmZQ86ioeEdqRuPRL2dkCYulKzNI6Wi/hw1RhBIsnQROGY6hXQogv1jqOff0dGqHxA== X-Received: by 10.28.139.66 with SMTP id n63mr4877284wmd.101.1516801751611; Wed, 24 Jan 2018 05:49:11 -0800 (PST) Received: from localhost (host-92-20-151-143.as13285.net. [92.20.151.143]) by smtp.gmail.com with ESMTPSA id s44sm3686418wrc.64.2018.01.24.05.49.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 24 Jan 2018 05:49:10 -0800 (PST) Date: Wed, 24 Jan 2018 13:49:07 +0000 From: graeme.gregory@linaro.org To: Leif Lindholm Cc: Ming Huang , linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, mengfanrong@huawei.com, waip23@126.com Message-ID: <20180124134907.GB32010@xora-haswell> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> <1516287703-35516-2-git-send-email-huangming23@huawei.com> <20180122135318.3ew44wno3sp7ruog@bivouac.eciton.net> MIME-Version: 1.0 In-Reply-To: <20180122135318.3ew44wno3sp7ruog@bivouac.eciton.net> User-Agent: Mutt/1.9.2 (2017-12-15) Subject: Re: [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Jan 2018 13:43:45 -0000 X-Groupsio-MsgNum: 20450 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="mojUlQ0s9EVzWg2t" Content-Disposition: inline --mojUlQ0s9EVzWg2t Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jan 22, 2018 at 01:53:18PM +0000, Leif Lindholm wrote: > Detailed commit description, please. >=20 > Graeme - any comments on ACPIness? >=20 I think Jeremy probably gave it a much more in depth review than I can below. Once he is happy Ill be happy. Graeme > On Thu, Jan 18, 2018 at 11:01:30PM +0800, Ming Huang wrote: > > From: Jason Zhang > >=20 > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Jason Zhang > > Signed-off-by: Ming Huang > > Signed-off-by: Heyi Guo > > --- > > Platform/Hisilicon/D05/D05.dsc | 1 + > > Platform/Hisilicon/D05/D05.fdf | 1 + > > Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++ > > Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +- > > Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++= ++++++++++++ > > Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++ > > Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++ > > 7 files changed, 677 insertions(+), 27 deletions(-) > >=20 > > diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D0= 5.dsc > > index 77a89fd..710339c 100644 > > --- a/Platform/Hisilicon/D05/D05.dsc > > +++ b/Platform/Hisilicon/D05/D05.dsc > > @@ -506,6 +506,7 @@ > > MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf > > =20 > > Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf > > + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf > > Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf > > =20 > > # > > diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D0= 5.fdf > > index 78ab0c8..97de4d2 100644 > > --- a/Platform/Hisilicon/D05/D05.fdf > > +++ b/Platform/Hisilicon/D05/D05.fdf > > @@ -241,6 +241,7 @@ READ_LOCK_STATUS =3D TRUE > > INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf > > =20 > > INF RuleOverride=3DACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/= AcpiTablesHi1616.inf > > + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf > > INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf > > =20 > > # > > diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/= Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h > > index 808219a..f1927e8 100644 > > --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h > > +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h >=20 > As far as I can tell, all of the changes to this file (and the > resulting counterpart in > Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc) are > non-functional. >=20 > Please break these changes out as a separate patch. > This is good cleanup, but unrelated to the stated change. >=20 > > @@ -19,6 +19,7 @@ > > =20 > > #ifndef _HI1610_PLATFORM_H_ > > #define _HI1610_PLATFORM_H_ > > +#include > > =20 > > // > > // ACPI table information used to initialize tables. > > @@ -44,5 +45,31 @@ > > } > > =20 > > #define HI1616_WATCHDOG_COUNT 2 > > +#define HI1616_GIC_STRUCTURE_COUNT 64 > > + > > +#define HI1616_MPID_TA_BASE 0x10000 > > +#define HI1616_MPID_TB_BASE 0x30000 > > +#define HI1616_MPID_TA_2_BASE 0x50000 > > +#define HI1616_MPID_TB_2_BASE 0x70000 > > + > > +// Differs from Juno, we have another affinity level beyond cluster an= d core > > +#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE= | ((ClusterId) << 8) | (CoreId)) > > +#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE= | ((ClusterId) << 8) | (CoreId)) > > +#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_= BASE | ((ClusterId) << 8) | (CoreId)) > > +#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_= BASE | ((ClusterId) << 8) | (CoreId)) > > + > > +// > > +// Multiple APIC Description Table > > +// > > +#pragma pack (1) > > + > > +typedef struct { > > + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; > > + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[= HI1616_GIC_STRUCTURE_COUNT]; > > + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; > > + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8]; > > +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE; > > + > > +#pragma pack () > > =20 > > #endif > > diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/S= ilicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc > > index 169ee72..33dca03 100644 > > --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc > > +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc > > @@ -1,9 +1,9 @@ > > /** @file > > * Multiple APIC Description Table (MADT) > > * > > -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved. > > -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved. > > -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved. > > +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved. > > +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved. > > +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved. >=20 > As mentioned by Ard elsewhere in the series - please only update your > own copyright dates. (I will not point this out through the rest of > the review, but please address throughout for v2.) >=20 > > * > > * This program and the accompanying materials > > * > > @@ -19,34 +19,11 @@ > > * > > **/ > > =20 > > - > > -#include > > +#include "Hi1616Platform.h" > > #include > > #include > > #include > > #include > > -#include "Hi1616Platform.h" >=20 > The above modifications are unnecessary. > - First there is a spurious whitespace deletion. > - Then there is a deletion of an include of an IndustryStandard header > file that is provably used later in this scope. > - Finally there is a (seemingly) spurious move of a local include > statement. >=20 > I understand the thinking behind the latter two, but I prefer the > clarity of explicitly including even though > "Hi1616Platform.h" now pulls it in - so please leave the above > unchanged. >=20 > > - > > -// Differs from Juno, we have another affinity level beyond cluster an= d core > > -// 0x20000 is only for socket 0 > > -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((Cluster= Id) << 8) | (CoreId)) > > -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((Cluster= Id) << 8) | (CoreId)) > > -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((Clust= erId) << 8) | (CoreId)) > > -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((Clust= erId) << 8) | (CoreId)) > > - > > -// > > -// Multiple APIC Description Table > > -// > > -#pragma pack (1) > > - > > -typedef struct { > > - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; > > - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[= 64]; > > - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; > > - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8]; > > -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE; > > - > > -#pragma pack () > > =20 > > EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt =3D { > > { > > diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/H= i1616/Pptt/Pptt.c > > new file mode 100644 > > index 0000000..eac4736 > > --- /dev/null > > +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c > > @@ -0,0 +1,447 @@ > > +/** @file > > +* > > +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. > > +* Copyright (c) 2017, Linaro Limited. All rights reserved. >=20 > Should probably say 2018 by now? >=20 > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of t= he BSD License > > +* which accompanies this distribution. The full text of the license = may be found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASI= S, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS O= R IMPLIED. > > +* > > +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ >=20 > I'm sure it is, but these now reside under > Platform/ARM/JunoPkg/AcpiTables. >=20 > > +* > > +**/ > > + > > +#include "Pptt.h" > > + > > +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol =3D NULL; > > +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol =3D NULL; > > + > > +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =3D > > + ARM_ACPI_HEADER ( > > + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE, > > + EFI_ACPI_DESCRIPTION_HEADER, > > + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION > > + ); > > + > > +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =3D > > +{ > > + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0} > > +}; > > + > > +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =3D > > +{ > > + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, = //L1I 48K 0xC000 CacheAssociativity8Way > > + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, = //L1D 32k 0x8000 CacheAssociativity8Way > > + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, = //L2 1M 0x100000 CacheAssociativity8Way > > + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x1= 0, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte > > +}; > > + > > +EFI_STATUS > > +InitCacheInfo( > > + ) > > +{ > > + UINT8 Index; > > + PPTT_TYPE1_ATTRIBUTES Type1Attributes; > > + CSSELR_DATA CsselrData; > > + CCSIDR_DATA CcsidrData; > > + > > + for (Index =3D 0; Index < PPTT_CACHE_NO - 1; Index++) { > > + CsselrData.Data =3D 0; > > + CcsidrData.Data =3D 0; > > + Type1Attributes.Data =3D 0; > > + > > + if (Index =3D=3D 0) { //L1I > > + CsselrData.Bits.InD =3D 1; > > + CsselrData.Bits.Level =3D 0; > > + Type1Attributes.Bits.CacheType =3D 1; > > + } else if (Index =3D=3D 1) { > > + Type1Attributes.Bits.CacheType =3D 0; > > + CsselrData.Bits.Level =3D Index -1; > > + } else { > > + Type1Attributes.Bits.CacheType =3D 2; > > + CsselrData.Bits.Level =3D Index -1; > > + } > > + > > + CcsidrData.Data =3D ReadCCSIDR (CsselrData.Data); > > + > > + if (CcsidrData.Bits.Wa =3D=3D 1) { > > + Type1Attributes.Bits.AllocateType =3D 1; > > + if (CcsidrData.Bits.Ra =3D=3D 1) { > > + Type1Attributes.Bits.AllocateType++; > > + } > > + } > > + > > + if (CcsidrData.Bits.Wt =3D=3D 1) { > > + Type1Attributes.Bits.WritePolicy =3D 1; > > + } > > + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level =3D %x!CcsidrData =3D %x!\n= ",CsselrData.Bits.Level, CcsidrData.Data)); > > + > > + mPpttCacheType1[Index].NumberOfSets =3D (UINT16)CcsidrData.Bits.Nu= mSets + 1; > > + mPpttCacheType1[Index].Associativity =3D (UINT16)CcsidrData.Bits.A= ssociativity + 1; > > + mPpttCacheType1[Index].LineSize =3D (UINT16)( 1 << (CcsidrData.Bit= s.LineSize + 4)); > > + mPpttCacheType1[Index].Size =3D mPpttCacheType1[Index].LineSize * = \ > > + mPpttCacheType1[Index].Associativity= * \ > > + mPpttCacheType1[Index].NumberOfSets; > > + mPpttCacheType1[Index].Attributes =3D Type1Attributes.Data; > > + mPpttCacheType1[Index].Flags =3D PPTT_TYPE1_SIZE_VALID | PPTT_TYPE= 1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \ > > + PPTT_TYPE1_ALLOCATION_TYPE_VALID | = PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \ > > + PPTT_TYPE1_LINE_SIZE_VALID; > > + > > + } > > + > > + // L3 > > + mPpttCacheType1[3].Flags =3D PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMB= ER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \ > > + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_T= YPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \ > > + PPTT_TYPE1_LINE_SIZE_VALID; > > + > > + return EFI_SUCCESS; > > +} > > + > > +EFI_STATUS > > +AddCoreTable( > > + IN VOID *PpttTable, > > + IN OUT VOID *PpttTableLengthRemain, > > + IN UINT32 Flags, > > + IN UINT32 Parent, > > + IN UINT32 ResourceNo, > > + IN UINT32 ProcessorId > > + ) > > +{ > > + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; > > + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1; > > + UINT32 *PrivateResource; > > + UINT8 Index; > > + > > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE= 0) + ResourceNo * 4) { > > + return EFI_OUT_OF_RESOURCES; > > + } > > + PpttType0 =3D (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DES= CRIPTION_HEADER *)PpttTable)->Length); > > + PpttType0->Type =3D 0; > > + PpttType0->Flags =3D Flags; > > + PpttType0->Parent=3D Parent; > > + PpttType0->AcpiProcessorId =3D ProcessorId; > > + PpttType0->PrivateResourceNo =3D ResourceNo; > > + PpttType0->Length =3D sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo *= 4; > > + > > + *(UINT32 *)PpttTableLengthRemain -=3D (UINTN)PpttType0->Length; > > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType0->L= ength; > > + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_= 6_2_PPTT_TYPE0)); > > + > > + // Add cache type structure > > + for (Index =3D 0; Index < ResourceNo; Index++, PrivateResource++) { > > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TY= PE1)) { > > + return EFI_OUT_OF_RESOURCES; > > + } > > + *PrivateResource =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->L= ength; > > + PpttType1 =3D (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_D= ESCRIPTION_HEADER *)PpttTable)->Length); > > + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_= 6_2_PPTT_TYPE1)); > > + *(UINT32 *)PpttTableLengthRemain -=3D PpttType1->Length; > > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType1-= >Length; > > + } > > + > > + return EFI_SUCCESS; > > +} > > + > > +EFI_STATUS > > +AddClusterTable ( > > + IN VOID *PpttTable, > > + IN OUT VOID *PpttTableLengthRemain, > > + IN UINT32 Flags, > > + IN UINT32 Parent, > > + IN UINT32 ResourceNo > > + ) > > +{ > > + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; > > + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1; > > + UINT32 *PrivateResource; > > + > > + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_T= YPE0) + ResourceNo * 4)) { > > + return EFI_OUT_OF_RESOURCES; > > + } > > + PpttType0 =3D (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DES= CRIPTION_HEADER *)PpttTable)->Length); > > + PpttType0->Type =3D 0; > > + PpttType0->Flags =3D Flags; > > + PpttType0->Parent=3D Parent; > > + PpttType0->PrivateResourceNo =3D ResourceNo; > > + PpttType0->Length =3D sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo *= 4; > > + > > + *(UINT32 *)PpttTableLengthRemain -=3D PpttType0->Length; > > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType0->L= ength; > > + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_= 6_2_PPTT_TYPE0)); > > + > > + // Add cache type structure > > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE= 1)) { > > + return EFI_OUT_OF_RESOURCES; > > + } > > + *PrivateResource =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Len= gth; > > + PpttType1 =3D (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DES= CRIPTION_HEADER *)PpttTable)->Length); > > + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PP= TT_TYPE1)); > > + *(UINT32 *)PpttTableLengthRemain -=3D PpttType1->Length; > > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType1->L= ength; > > + > > + return EFI_SUCCESS; > > +} > > + > > +EFI_STATUS > > +AddScclTable( > > + IN VOID *PpttTable, > > + IN OUT VOID *PpttTableLengthRemain, > > + IN UINT32 Flags, > > + IN UINT32 Parent, > > + IN UINT32 ResourceNo > > + ) > > +{ > > + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; > > + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1; > > + UINT32 *PrivateResource; > > + > > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE= 0) + ResourceNo * 4) { > > + return EFI_OUT_OF_RESOURCES; > > + } > > + PpttType0 =3D (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DES= CRIPTION_HEADER *)PpttTable)->Length); > > + PpttType0->Type =3D 0; > > + PpttType0->Flags =3D Flags; > > + PpttType0->Parent=3D Parent; > > + PpttType0->PrivateResourceNo =3D ResourceNo; > > + PpttType0->Length =3D sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo *= 4; > > + > > + *(UINT32 *)PpttTableLengthRemain -=3D PpttType0->Length; > > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType0->L= ength; > > + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_= 6_2_PPTT_TYPE0)); > > + > > + // Add cache type structure > > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE= 1)) { > > + return EFI_OUT_OF_RESOURCES; > > + } > > + *PrivateResource =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Len= gth; > > + PpttType1 =3D (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DES= CRIPTION_HEADER *)PpttTable)->Length); > > + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PP= TT_TYPE1)); > > + *(UINT32 *)PpttTableLengthRemain -=3D PpttType1->Length; > > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType1->L= ength; > > + > > + return EFI_SUCCESS; > > +} > > + > > +EFI_STATUS > > +AddSocketTable( > > + IN VOID *PpttTable, > > + IN OUT VOID *PpttTableLengthRemain, > > + IN UINT32 Flags, > > + IN UINT32 Parent, > > + IN UINT32 ResourceNo > > + ) > > +{ > > + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; > > + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2; > > + UINT32 *PrivateResource; > > + UINT8 Index; > > + > > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE= 0)) { > > + return EFI_OUT_OF_RESOURCES; > > + } > > + PpttType0 =3D (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DES= CRIPTION_HEADER *)PpttTable)->Length); > > + PpttType0->Type =3D 0; > > + PpttType0->Flags =3D Flags; > > + PpttType0->Parent=3D Parent; > > + PpttType0->PrivateResourceNo =3D ResourceNo; > > + PpttType0->Length =3D sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo *= 4; > > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType0->L= ength; > > + > > + *(UINT32 *)PpttTableLengthRemain -=3D PpttType0->Length; > > + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) { > > + return EFI_OUT_OF_RESOURCES; > > + } > > + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_= 6_2_PPTT_TYPE0)); > > + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = =3D %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2))); > > + > > + for (Index =3D 0; Index < ResourceNo; Index++, PrivateResource++) { > > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TY= PE2)) { > > + return EFI_OUT_OF_RESOURCES; > > + } > > + *PrivateResource =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->L= ength; > > + PpttType2 =3D (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_D= ESCRIPTION_HEADER *)PpttTable)->Length); > > + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI= _6_2_PPTT_TYPE2)); > > + *(UINT32 *)PpttTableLengthRemain -=3D PpttType2->Length; > > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType2-= >Length; > > + } > > + > > + return EFI_SUCCESS; > > +} > > + > > +VOID > > +GetApic( > > +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable, > > +VOID *PpttTable, > > +IN UINT32 PpttTableLengthRemain, > > +IN UINT32 Index1 > > +) > > +{ > > + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore; > > + UINT32 SocketOffset, ScclOffset, ClusterOffset; > > + UINT32 Parent =3D 0; > > + UINT32 Flags =3D 0; > > + UINT32 ResourceNo =3D 0; > > + //Get APIC data > > + for (IndexSocket =3D 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++)= { > > + SocketOffset =3D 0; > > + for (IndexSccl =3D 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) { > > + ScclOffset =3D 0; > > + for (IndexCulster =3D 0; IndexCulster < PPTT_CULSTER_NO; IndexCu= lster++) { > > + ClusterOffset =3D 0; > > + for (IndexCore =3D 0; IndexCore < PPTT_CORE_NO; IndexCore++) { > > + > > + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%= x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,In= dexCore)); > > + > > + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid !=3D I= ndex1) { > > + //This processor is unusable > > + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table = for UID!\n")); > > + return; > > + } > > + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) =3D=3D 0= ) { > > + //This processor is unusable > > + Index1++; > > + continue; > > + } > > + > > + if (SocketOffset =3D=3D 0) { > > + //Add socket0 for type0 table > > + ResourceNo =3D PPTT_SOCKET_COMPONENT_NO; > > + SocketOffset =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable= )->Length; > > + Parent =3D 0; > > + Flags =3D PPTT_TYPE0_SOCKET_FLAG; > > + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, = Parent, ResourceNo); > > + } > > + if (ScclOffset =3D=3D 0) { > > + //Add socket0die0 for type0 table > > + ResourceNo =3D 1; > > + ScclOffset =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)= ->Length ; > > + Parent =3D SocketOffset; > > + Flags =3D PPTT_TYPE0_DIE_FLAG; > > + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Pa= rent, ResourceNo); > > + } > > + if (ClusterOffset =3D=3D 0) { > > + //Add socket0die0ClusterId for type0 table > > + ResourceNo =3D 1; > > + ClusterOffset =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTab= le)->Length ; > > + Parent =3D ScclOffset; > > + Flags =3D PPTT_TYPE0_CLUSTER_FLAG; > > + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags,= Parent, ResourceNo); > > + } > > + > > + //Add socket0die0ClusterIdCoreId for type0 table > > + ResourceNo =3D 2; > > + Parent =3D ClusterOffset; > > + Flags =3D PPTT_TYPE0_CORE_FLAG; > > + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Pare= nt, ResourceNo, Index1); > > + > > + Index1++; > > + } > > + } > > + } > > + } > > + return ; > > +} > > + > > +VOID > > +PpttSetAcpiTable( > > + IN EFI_EVENT Event, > > + IN VOID *Context > > + ) > > +{ > > + UINTN AcpiTableHandle; > > + EFI_STATUS Status; > > + UINT8 Checksum; > > + EFI_ACPI_SDT_HEADER *Table; > > + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable; > > + EFI_ACPI_TABLE_VERSION TableVersion; > > + VOID *PpttTable; > > + UINTN TableKey; > > + UINT32 Index0, Index1; > > + UINT32 PpttTableLengthRemain = =3D 0; > > + > > + gBS->CloseEvent (Event); > > + > > + InitCacheInfo (); > > + > > + PpttTable =3D AllocateZeroPool (PPTT_TABLE_MAX_LEN); > > + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_H= EADER)); > > + PpttTableLengthRemain =3D PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCR= IPTION_HEADER); > > + > > + for (Index0 =3D 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) { > > + Status =3D mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableV= ersion, &TableKey); > > + if (EFI_ERROR (Status)) { > > + break; > > + } > > + //Find APIC table > > + if (Table->Signature !=3D EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_T= ABLE_SIGNATURE) { > > + continue; > > + } > > + > > + ApicTable =3D (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Tabl= e; > > + Index1 =3D 0; > > + > > + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1); > > + break; > > + } > > + > > + if (EFI_ERROR (Status)) { > > + DEBUG ((DEBUG_ERROR,"%a:%d Status=3D%r\n",__FILE__,__LINE__,Status= )); > > + } > > + > > + Checksum =3D CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DE= SCRIPTION_HEADER *)PpttTable)->Length); > > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum=3D Checksum; > > + > > + AcpiTableHandle =3D 0; > > + Status =3D mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol,= PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableH= andle); > > + > > + FreePool (PpttTable); > > + return ; > > +} > > + > > +EFI_STATUS > > +InitPpttTable( > > + ) > > +{ > > + EFI_STATUS Status; > > + EFI_EVENT ReadyToBootEvent; > > + > > + Status =3D EfiCreateEventReadyToBootEx ( > > + TPL_NOTIFY, > > + PpttSetAcpiTable, > > + NULL, > > + &ReadyToBootEvent > > + ); > > + ASSERT_EFI_ERROR (Status); > > + > > + return Status; > > +} > > + > > +EFI_STATUS > > +EFIAPI > > +PpttEntryPoint( > > + IN EFI_HANDLE ImageHandle, > > + IN EFI_SYSTEM_TABLE *SystemTable > > + ) > > +{ > > + EFI_STATUS Status; > > + > > + Status =3D gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (= VOID**)&mAcpiTableProtocol); > > + if (EFI_ERROR (Status)) { > > + return EFI_ABORTED; > > + } > > + > > + Status =3D gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOI= D**) &mAcpiSdtProtocol); > > + if (EFI_ERROR (Status)) { > > + return EFI_ABORTED; > > + } > > + > > + InitPpttTable (); > > + > > + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n")); > > + > > + return EFI_SUCCESS; > > +} > > diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/H= i1616/Pptt/Pptt.h > > new file mode 100644 > > index 0000000..5dc635f > > --- /dev/null > > +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h > > @@ -0,0 +1,142 @@ > > +/** @file > > +* > > +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. > > +* Copyright (c) 2017, Linaro Limited. All rights reserved. >=20 > 2018? >=20 > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of t= he BSD License > > +* which accompanies this distribution. The full text of the license = may be found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASI= S, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS O= R IMPLIED. > > +* > > +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ >=20 > Platform/ARM/JunoPkg/AcpiTables. >=20 > > +* > > +**/ > > + > > +#ifndef _PPTT_H_ > > +#define _PPTT_H_ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include "../D05AcpiTables/Hi1616Platform.h" > > + > > +/// > > +/// "PPTT" Processor Properties Topology Table > > +/// > > +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SI= GNATURE_32('P', 'P', 'T', 'T') > > +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x= 01 > > +#define EFI_ACPI_MAX_NUM_TABLES 20 > > + > > +#define PPTT_TABLE_MAX_LEN 0x6000 > > +#define PPTT_SOCKET_NO 0x2 > > +#define PPTT_DIE_NO 0x2 > > +#define PPTT_CULSTER_NO 0x4 > > +#define PPTT_CORE_NO 0x4 > > +#define PPTT_SOCKET_COMPONENT_NO 0x1 > > +#define PPTT_CACHE_NO 0x4 > > + > > +#define PPTT_TYPE0_PHYSICAL_PKG BIT0 > > +#define PPTT_TYPE0_PROCESSORID_VALID BIT1 > > +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG > > +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG > > +#define PPTT_TYPE0_CLUSTER_FLAG 0 > > +#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID > > + > > +#define PPTT_TYPE1_SIZE_VALID BIT0 > > +#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1 > > +#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2 > > +#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3 > > +#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4 > > +#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5 > > +#define PPTT_TYPE1_LINE_SIZE_VALID BIT6 > > + > > +typedef union { > > + struct { > > + UINT32 InD :1; > > + UINT32 Level :3; > > + UINT32 Reserved :28; > > + } Bits; > > + UINT32 Data; > > +}CSSELR_DATA; > > + > > +typedef union { > > + struct { > > + UINT32 LineSize :3; > > + UINT32 Associativity :10; > > + UINT32 NumSets :15; > > + UINT32 Wa :1; > > + UINT32 Ra :1; > > + UINT32 Wb :1; > > + UINT32 Wt :1; > > + } Bits; > > + UINT32 Data; > > +}CCSIDR_DATA; > > + > > +// > > +// Processor Hierarchy Node Structure > > +// > > +typedef struct { > > + UINT8 Type; > > + UINT8 Length; > > + UINT16 Reserved; > > + UINT32 Flags; > > + UINT32 Parent; > > + UINT32 AcpiProcessorId; > > + UINT32 PrivateResourceNo; > > +} EFI_ACPI_6_2_PPTT_TYPE0; > > + > > +// > > +// Cache Configuration > > +// > > +typedef union { > > + struct { > > + UINT8 AllocateType :2; > > + UINT8 CacheType :2; > > + UINT8 WritePolicy :1; > > + UINT8 Reserved :3; > > + } Bits; > > + UINT8 Data; > > +}PPTT_TYPE1_ATTRIBUTES; > > + > > +// > > +// Cache Type Structure > > +// > > +typedef struct { > > + UINT8 Type; > > + UINT8 Length; > > + UINT16 Reserved; > > + UINT32 Flags; > > + UINT32 NextLevelOfCache; > > + UINT32 Size; > > + UINT32 NumberOfSets; > > + UINT8 Associativity; > > + UINT8 Attributes; > > + UINT16 LineSize; > > +} EFI_ACPI_6_2_PPTT_TYPE1; > > + > > +// > > +// ID Structure > > +// > > +typedef struct { > > + UINT8 Type; > > + UINT8 Length; > > + UINT16 Reserved; > > + UINT32 VendorId; > > + UINT64 Level1Id; > > + UINT64 Level2Id; > > + UINT16 MajorRev; > > + UINT16 MinorRev; > > + UINT16 SpinRev; > > +} EFI_ACPI_6_2_PPTT_TYPE2; > > + > > +#endif // _PPTT_H_ > > + > > diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon= /Hi1616/Pptt/Pptt.inf > > new file mode 100644 > > index 0000000..ce26b97 > > --- /dev/null > > +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf > > @@ -0,0 +1,55 @@ > > +/** @file > > +* > > +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. > > +* Copyright (c) 2017, Linaro Limited. All rights reserved. >=20 > 2018? >=20 > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of t= he BSD License > > +* which accompanies this distribution. The full text of the license = may be found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASI= S, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS O= R IMPLIED. > > +* > > +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ >=20 > Platform/ARM/JunoPkg/AcpiTables. >=20 > > +* > > +**/ > > + > > +[Defines] > > + INF_VERSION =3D 0x00010005 >=20 > A new .inf should probably claim 0x00010020. >=20 > > + BASE_NAME =3D AcpiPptt > > + FILE_GUID =3D AAB14F90-DC2E-4f33-A594-C7894A5B4= 12D > > + MODULE_TYPE =3D DXE_DRIVER > > + VERSION_STRING =3D 1.0 > > + ENTRY_POINT =3D PpttEntryPoint > > + > > +[Sources.common] > > + Pptt.c > > + Pptt.h > > + > > +[Packages] > > + MdePkg/MdePkg.dec > > + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec >=20 > This is incorrect - path resolution should be using PACKAGES_PATH and > refer only to Silicon/Hisilicon/HisiPkg.dec. >=20 > > + ArmPkg/ArmPkg.dec >=20 > Please sort these alphabetically. >=20 > > + > > +[LibraryClasses] > > + ArmLib > > + HobLib > > + UefiRuntimeServicesTableLib > > + UefiDriverEntryPoint > > + BaseMemoryLib > > + DebugLib >=20 > Please sort these alphabetically. >=20 > > + > > +[Guids] > > + > > + > > +[Protocols] > > + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONS= UMED > > + gEfiAcpiSdtProtocolGuid >=20 > Please sort these alphabetically (where there is not a more logical > grouping available). >=20 > / > Leif >=20 > > + > > +[Pcd] > > + > > + > > +[Depex] > > + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid > > + > > --=20 > > 1.9.1 > >=20 --mojUlQ0s9EVzWg2t Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEenb+qYJ1KjE/UpmZkGKawB22KXYFAlpojrwACgkQkGKawB22 KXbklRAAkQl8GkITCEVJkY4CImQbrAOBKp3JCMovWC3vtHG+SQ18kY3S/KbyCo2m zq0YAjpBZsof/vwBV6Fajgw/REgvVT+12h+rp+k1zBrpTaoW+J2/v46geirHimzp J4FKX3ZAJpwe1QJj83r1ngMeU2Hl9SIJ2uu8Pn6TfFON8/9JgVMZ4I7Z0Bj6guC7 K5m/E/Yl0zHv9k8GKcCK5a2SU1s3JbSeh5gWPrbQFOoDnk0AwDK5ZNYrXwwQop7I Rt5s6eoiOuDkOCYifgaIv1L82Q888FqVOrVwT02anBH1Rl6icNiaax/KMKvKYass cwUZl2UbVaJzcVKyf1Od6cqzXkWZEal4ArFO6TcO7AayBKhQ3hCyiCqSnqGx/Vtc gGB86P1MQbUT/axOEXsyquzEKruK+mIWI9U8GniwnGNIvBNifyshMrwzD2XppSWP TuP00uYqNMBuNLCgIa0KKVuTifoHG8958P2XUAWX5/VUn+K5A0XKwAVi0C1zfG9B 4UloRs0j0aaBXVPYMtck/x/Nif5iP5rhnV4pbgyq5w5IJnV7Jp89E92jQXuHay6x gc2u/EU+1Q5pxNopSXsBXr12t+f2NFe6UIXVlU40fwu/Jf6k+KWeCeiZ9/73dXee rU8nnZ4JPwV92zy9FRWlbDbQc7o22yAMXhgAGp9ICiCbRRtWrnc= =AsiE -----END PGP SIGNATURE----- --mojUlQ0s9EVzWg2t--