From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::243; helo=mail-wm0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BBA34222A3348 for ; Thu, 25 Jan 2018 04:22:24 -0800 (PST) Received: by mail-wm0-x243.google.com with SMTP id r71so14404461wmd.1 for ; Thu, 25 Jan 2018 04:27:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+z4ovW6TIaaC4nkL3RLs3j5MTR8XeOuNge1td5JF4Pg=; b=TR3QqaHjQQChvN0RdhHVcipSbduR5qUXfCNTLYnQq8ZfHXyC4jV4KrbUyYGb2E1Pny wGhu9zZ7c5sT1qa2LBRY2cJ99DAJgrMcZef32k8t1bwR1oih5PEeeCwjMxwz2XQTQvXL 7bgnVScjWBxALDf+htgKszzCLZvODzw3YBbKE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+z4ovW6TIaaC4nkL3RLs3j5MTR8XeOuNge1td5JF4Pg=; b=X70XNontOMj26rs43COofixlukBMFLk72Slt6OGNMvbqLDycUv0T4C+1S07JPBTd/F pXQP6Oy0yZKSWi6xQL+UztDSlG6kxXX/5JlyVXIxU/EuoK+KNOcBlXeumnjcoEOsYur3 Ye/J3hC9+PVWQQwCc0xh27WGrVY9xhdn2PvleelhM+h+QYT7IzvTTSYeH34PgMGn7YsO 8Y7MI8dy8E9FyPMwi3LlSNIpzS2u372bGNu7CPkRWbl8lo7Aw083UqHTikTChOTNaevG /9hZ5tzPQuCs4uet1b1k1ojCgeUiPBqxzcso/xuQYg3+X9wUuVkm+tj1UnKDGvMXJ/Rr QGFg== X-Gm-Message-State: AKwxytebfqRH65kh9r6UdxZJmVjut6MyLC476eQD2h8OtlFJLiELqQY7 EEKkPHYTuLwBl66C0LB85glua6LB7tg= X-Google-Smtp-Source: AH8x2250JlQVDp0NPbNW+V6ln8pYOoQdLQv/QhaUrjf+B4cMYW9JVZ/6Bj499mQjVXV9Fl8wJ71Oug== X-Received: by 10.28.217.213 with SMTP id q204mr2579357wmg.154.1516883272475; Thu, 25 Jan 2018 04:27:52 -0800 (PST) Received: from localhost.localdomain ([160.167.127.168]) by smtp.gmail.com with ESMTPSA id v75sm5510001wrc.45.2018.01.25.04.27.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Jan 2018 04:27:51 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, Ard Biesheuvel Date: Thu, 25 Jan 2018 12:27:33 +0000 Message-Id: <20180125122736.5427-6-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180125122736.5427-1-ard.biesheuvel@linaro.org> References: <20180125122736.5427-1-ard.biesheuvel@linaro.org> Subject: [PATCH edk2-platforms 5/8] Silicon/SynQuacer: load I2C driver before platform DXE driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Jan 2018 12:22:25 -0000 To ensure that the I2C master protocol is installed immediately onto the handles created by PlatformDxe in its entry point, force the SynQuacerI2cDxe driver to be loaded before PlatformDxe. These handles are recursively connected by the DXE core as soon as they appear, and so ensuring that the I2C master protocol driver is available at this time will ensure that these handles will be connected to it right away. This is useful when implementations of architectural protocols such as RTC or the EFI variable store, which should become available long before the ordinary dispatch of UEFI driver model drivers is started at the end of DXE, are based on I2C. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 +- Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf | 2 +- Silicon/Socionext/SynQuacer/SynQuacer.dec | 2 ++ 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf index 4d6a1d637922..f075957d7456 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf @@ -17,7 +17,7 @@ [Defines] INF_VERSION = 0x0001001A BASE_NAME = PlatformDxe - FILE_GUID = ac422cc1-d916-489a-b165-536fdfc633c2 + FILE_GUID = ac422cc1-d916-489a-b165-536fdfc633c2 # gSynQuacerPlatformDxeFileGuid MODULE_TYPE = DXE_DRIVER VERSION_STRING = 1.0 ENTRY_POINT = PlatformDxeEntryPoint diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf index fa715366878c..325816ba0b88 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf @@ -56,4 +56,4 @@ [FixedPcd] gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock [Depex] - TRUE + BEFORE gSynQuacerPlatformDxeFileGuid diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec index a21f12b5bc32..76529e3c2164 100644 --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -25,6 +25,8 @@ [Guids] gSynQuacerNonDiscoverableI2cMasterGuid = { 0x364ee675, 0x9e44, 0x42b7, { 0xa5, 0xe4, 0x92, 0x84, 0xdb, 0x85, 0xda, 0x09 } } gSynQuacerNonDiscoverableRuntimeI2cMasterGuid = { 0x5f35aa9b, 0x8c6f, 0x4828, { 0xbd, 0x44, 0x7c, 0xc0, 0xeb, 0x2d, 0xfe, 0xb9 } } + gSynQuacerPlatformDxeFileGuid = { 0xac422cc1, 0xd916, 0x489a, { 0xb1, 0x65, 0x53, 0x6f, 0xdf, 0xc6, 0x33, 0xc2 } } + [Ppis] gSynQuacerDramInfoPpiGuid = { 0x3e1d7356, 0xdda4, 0x4b1a, { 0x93, 0x46, 0xbf, 0x89, 0x1c, 0x86, 0x46, 0xcc } } -- 2.11.0