From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::242; helo=mail-wr0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x242.google.com (mail-wr0-x242.google.com [IPv6:2a00:1450:400c:c0c::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A3E3D222A3348 for ; Thu, 25 Jan 2018 04:22:27 -0800 (PST) Received: by mail-wr0-x242.google.com with SMTP id 36so7501622wrh.1 for ; Thu, 25 Jan 2018 04:27:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NvfxCgDaHWmqVfRQkqFieJ9TmnsQy574OKWfDO41e6I=; b=jSTtdCHfY1Tx2oeDRbUgaS/ShcrosdMJNPo36jTxvHxp4lNHA0B+0gejjoHjqwArOA q3XMI/FKS70twT+/WkXiIbkqjVBWbRQw9A07CWspwuJ8CXI8TfFBURrgHDz/dgsdXWdY 748IIA4loh1+4YJTlMkgo3yoSnWfVxgDx4owc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NvfxCgDaHWmqVfRQkqFieJ9TmnsQy574OKWfDO41e6I=; b=ix4RMJqq5yDiuRCmMVV2LKPqXzD4di/zwSb0i+T+orKwskRYt3sqnW/qSMp95CNItG I7Db536bcQWxjsgOTOSVTsiy9YEAYiXs8wdCH56+kKmIJ9LZQ+jkFrccr3qNh8PJa7Gs 9LGdvA4GgA1GVYLCmLLI1/HicyxDO/Il784nB+hXCvJlj+GQkrn0Qr2kg2pEzPxMAj2p IoMCo/e5Wvk3z+HcisAMiVWkXwumZ3etVtl/gNjV2d1Au/bERmp5zYHjLorG+xyoAuy9 xe86gXW/EJ6KYk5onFnhmT25IM8ZncTyoEWgA6s3IOhVr8iKcEppzac3H3CxmGxO1KCC qqIQ== X-Gm-Message-State: AKwxytccw+c8rwW+fWBDKbEzl66l/JU1yO+97yooJJkiwOBdvI9vddhj MOmfO7qEXMeIT9kLx5YVfUsTOD8O544= X-Google-Smtp-Source: AH8x224o1Hyd6b+QfCi8cGFMa03GtGXVXrWCwdg9mHa2XKVI0GXoU3A926d7atraSILAn7cWF6+g9g== X-Received: by 10.223.184.102 with SMTP id u35mr8472318wrf.143.1516883275463; Thu, 25 Jan 2018 04:27:55 -0800 (PST) Received: from localhost.localdomain ([160.167.127.168]) by smtp.gmail.com with ESMTPSA id v75sm5510001wrc.45.2018.01.25.04.27.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Jan 2018 04:27:54 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, Ard Biesheuvel Date: Thu, 25 Jan 2018 12:27:35 +0000 Message-Id: <20180125122736.5427-8-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180125122736.5427-1-ard.biesheuvel@linaro.org> References: <20180125122736.5427-1-ard.biesheuvel@linaro.org> Subject: [PATCH edk2-platforms 7/8] Silicon/SynQuacer/DeviceTree: update NETSEC DT node to latest binding X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Jan 2018 12:22:28 -0000 The upstream version of the Linux NETSEC driver expects the PHY DT node to appear under a MDIO subnode, so fix this in the device tree. Fix the node name as well, this should be 'ethernet' not 'netsec', and add a clock-names property describing the single clock reference as 'phy_ref_clk'. Also, move the PHY subnode into the per-platform .dts file so we can set the unit address in the node name. This is necessary because recent versions of the DT compiler are more finicky about this. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts | 7 +++++ Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 30 +++++++++----------- Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts | 7 +++++ 3 files changed, 28 insertions(+), 16 deletions(-) diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts index d2cd7ef90e6f..488c51a0f793 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts +++ b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts @@ -44,3 +44,10 @@ "GPIO-K", "GPIO-L", "PEC-PD26", "PEC-PD27", "PEC-PD28", "PEC-PD29", "PEC-PD30", "PEC-PD31"; }; + +&mdio_netsec { + phy_netsec: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <7>; + }; +}; diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 7c3518facb98..6ee7a0b7ccb4 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -457,25 +457,23 @@ #clock-cells = <0>; }; - eth0: netsec@522D0000 { - compatible = "socionext,synquacer-netsec"; - reg = <0 0x522d0000 0x0 0x10000>, - <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>; - interrupts = ; - clocks = <&clk_netsec>; - phy-mode = "rgmii"; - max-speed = <1000>; - max-frame-size = <9000>; - phy-handle = <ðphy0>; - dma-coherent; + ethernet@522d0000 { + compatible = "socionext,synquacer-netsec"; + reg = <0 0x522d0000 0x0 0x10000>, + <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>; + interrupts = ; + clocks = <&clk_netsec>; + clock-names = "phy_ref_clk"; + phy-mode = "rgmii"; + max-speed = <1000>; + max-frame-size = <9000>; + phy-handle = <&phy_netsec>; + dma-coherent; + mdio_netsec: mdio { #address-cells = <1>; #size-cells = <0>; - - ethphy0: ethernet-phy { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = ; - }; + }; }; smmu: iommu@582c0000 { diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts index 132fd370a71b..97fddfedcb46 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts @@ -34,3 +34,10 @@ &sdhci { status = "okay"; }; + +&mdio_netsec { + phy_netsec: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; -- 2.11.0