* [PATCH edk2-platforms 1/8] Silicon/SynQuacer/PlatformDxe: enable spread spectrum mode for ASM1061 SATA
2018-01-25 12:27 [PATCH edk2-platforms 0/8] Socionext SynQuacer updates Ard Biesheuvel
@ 2018-01-25 12:27 ` Ard Biesheuvel
2018-01-25 12:27 ` [PATCH edk2-platforms 2/8] Silicon: fix typo in gPcf8563RealTimeClockLibI2cMasterProtocolGuid Ard Biesheuvel
` (7 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Ard Biesheuvel @ 2018-01-25 12:27 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, Ard Biesheuvel
The ASM1061 SATA controller integrated into the DeveloperBox board
emits too much electromagnetic radiation, so it needs spread spectrum
mode enabled.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/{Asmedia118x.c => Pci.c} | 83 +++++++++++++++-----
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 +-
2 files changed, 64 insertions(+), 21 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Asmedia118x.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c
similarity index 64%
rename from Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Asmedia118x.c
rename to Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c
index 874e83a649b5..9af3dd942cdd 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Asmedia118x.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c
@@ -15,9 +15,12 @@
#include "PlatformDxe.h"
#define ASMEDIA_VID 0x1b21
+#define ASM1061_PID 0x0612
#define ASM1182E_PID 0x1182
#define ASM1184E_PID 0x1184
+#define ASM1061_SSC_OFFSET 0xA10
+
#define ASM118x_PCIE_CAPABILITY_OFFSET 0x80
#define ASM118x_PCIE_LINK_CONTROL_OFFSET (ASM118x_PCIE_CAPABILITY_OFFSET + \
OFFSET_OF (PCI_CAPABILITY_PCIEXP, \
@@ -39,24 +42,10 @@ RetrainAsm1184eDownstreamPort (
IN EFI_PCI_IO_PROTOCOL *PciIo
)
{
- UINT16 PciVidPid[2];
EFI_STATUS Status;
PCIE_CAP Cap;
PCI_REG_PCIE_LINK_CONTROL LinkControl;
- Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, PCI_VENDOR_ID_OFFSET,
- ARRAY_SIZE (PciVidPid), &PciVidPid);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "%a: failed to read PCI vendor/product ID - %r\n",
- __FUNCTION__, Status));
- return;
- }
-
- if (PciVidPid[0] != ASMEDIA_VID ||
- (PciVidPid[1] != ASM1182E_PID && PciVidPid[1] != ASM1184E_PID)) {
- return;
- }
-
//
// The upstream and downstream ports share the same PID/VID, so check
// the port type. This assumes the PCIe Express capability block lives
@@ -91,6 +80,34 @@ RetrainAsm1184eDownstreamPort (
STATIC
VOID
+EnableAsm1061SpreadSpectrum (
+ IN EFI_PCI_IO_PROTOCOL *PciIo
+ )
+{
+ EFI_STATUS Status;
+ UINT8 SscVal;
+
+ DEBUG ((DEBUG_INFO, "%a: enabling spread spectrum mode 0 for ASM1061\n",
+ __FUNCTION__));
+
+ // SSC mode 0~-4000 ppm, 1:1 modulation
+
+ SscVal = 0;
+ Status = PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, ASM1061_SSC_OFFSET, 1,
+ &SscVal);
+ ASSERT_EFI_ERROR (Status);
+
+ MemoryFence ();
+ gBS->Stall (1); // delay at least 100 ns between writes of the same register
+
+ SscVal = 1;
+ Status = PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, ASM1061_SSC_OFFSET, 1,
+ &SscVal);
+ ASSERT_EFI_ERROR (Status);
+}
+
+STATIC
+VOID
EFIAPI
OnPciIoProtocolNotify (
IN EFI_EVENT Event,
@@ -101,6 +118,7 @@ OnPciIoProtocolNotify (
EFI_STATUS Status;
EFI_HANDLE HandleBuffer;
UINTN BufferSize;
+ UINT16 PciVidPid[2];
while (TRUE) {
BufferSize = sizeof (EFI_HANDLE);
@@ -114,12 +132,37 @@ OnPciIoProtocolNotify (
(VOID **)&PciIo);
ASSERT_EFI_ERROR (Status);
- //
- // The ASM1184E 4-port PCIe switch on the DeveloperBox board (and its
- // 2-port sibling of which samples were used in development) needs a
- // little nudge to get it to train the downstream links at Gen2 speed.
- //
- RetrainAsm1184eDownstreamPort (PciIo);
+ Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, PCI_VENDOR_ID_OFFSET,
+ ARRAY_SIZE (PciVidPid), &PciVidPid);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "%a: failed to read PCI vendor/product ID - %r\n",
+ __FUNCTION__, Status));
+ continue;
+ }
+
+ if (PciVidPid[0] != ASMEDIA_VID) {
+ continue;
+ }
+
+ switch (PciVidPid[1]) {
+ case ASM1061_PID:
+ //
+ // The ASM1061 SATA controller as integrated into the DeveloperBox design
+ // emits too much electromagnetic radiation. So enable spread spectrum
+ // mode.
+ //
+ EnableAsm1061SpreadSpectrum (PciIo);
+ break;
+ case ASM1182E_PID:
+ case ASM1184E_PID:
+ //
+ // The ASM1184E 4-port PCIe switch on the DeveloperBox board (and its
+ // 2-port sibling of which samples were used in development) needs a
+ // little nudge to get it to train the downstream links at Gen2 speed.
+ //
+ RetrainAsm1184eDownstreamPort (PciIo);
+ break;
+ }
}
}
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
index 7d3b88a5b52e..766f4041c826 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
@@ -23,7 +23,7 @@ [Defines]
ENTRY_POINT = PlatformDxeEntryPoint
[Sources]
- Asmedia118x.c
+ Pci.c
PlatformDxe.c
[Packages]
--
2.11.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH edk2-platforms 2/8] Silicon: fix typo in gPcf8563RealTimeClockLibI2cMasterProtocolGuid
2018-01-25 12:27 [PATCH edk2-platforms 0/8] Socionext SynQuacer updates Ard Biesheuvel
2018-01-25 12:27 ` [PATCH edk2-platforms 1/8] Silicon/SynQuacer/PlatformDxe: enable spread spectrum mode for ASM1061 SATA Ard Biesheuvel
@ 2018-01-25 12:27 ` Ard Biesheuvel
2018-01-25 12:51 ` Leif Lindholm
2018-01-25 12:27 ` [PATCH edk2-platforms 3/8] Silicon/NXP/Pcf8563RealTimeClockLib: avoid driver binding protocol Ard Biesheuvel
` (6 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Ard Biesheuvel @ 2018-01-25 12:27 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, Ard Biesheuvel
Do a global replace of gPcf8563RealTimeClockLibI2cMasterProtolGuid with
gPcf8563RealTimeClockLibI2cMasterProtocolGuid.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c | 2 +-
Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec | 2 +-
Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf | 4 ++--
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | 2 +-
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 +-
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
index 67f8e7de4025..6bc4aef28849 100644
--- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
+++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
@@ -373,7 +373,7 @@ LibRtcInitialize (
//
BufferSize = sizeof (EFI_HANDLE);
Status = gBS->LocateHandle (ByProtocol,
- &gPcf8563RealTimeClockLibI2cMasterProtolGuid, NULL,
+ &gPcf8563RealTimeClockLibI2cMasterProtocolGuid, NULL,
&BufferSize, &mI2cMasterHandle);
ASSERT_EFI_ERROR (Status);
diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec
index 3849056f164a..94c4a3f1ef4c 100644
--- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec
+++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec
@@ -22,7 +22,7 @@ [Guids]
gPcf8563RealTimeClockLibTokenSpaceGuid = { 0xaaf5b169, 0x93a0, 0x4d60, { 0xba, 0xe4, 0x06, 0x07, 0x92, 0x8e, 0x63, 0xdd }}
[Protocols]
- gPcf8563RealTimeClockLibI2cMasterProtolGuid = { 0xa6af18ae, 0x3bd5, 0x4af9, { 0xbb, 0x6a, 0xdb, 0x85, 0x07, 0x62, 0x81, 0x38 }}
+ gPcf8563RealTimeClockLibI2cMasterProtocolGuid = { 0xa6af18ae, 0x3bd5, 0x4af9, { 0xbb, 0x6a, 0xdb, 0x85, 0x07, 0x62, 0x81, 0x38 }}
[PcdsFixedAtBuild]
gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51|UINT8|0x00000001
diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
index 9907e343ba78..1a9a6f6c9cf3 100644
--- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
+++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
@@ -42,11 +42,11 @@ [Guids]
[Protocols]
gEfiDriverBindingProtocolGuid ## CONSUMES
gEfiI2cMasterProtocolGuid ## CONSUMES
- gPcf8563RealTimeClockLibI2cMasterProtolGuid ## CONSUMES
+ gPcf8563RealTimeClockLibI2cMasterProtocolGuid ## CONSUMES
[FixedPcd]
gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress
gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cBusFrequency
[Depex]
- gPcf8563RealTimeClockLibI2cMasterProtolGuid
+ gPcf8563RealTimeClockLibI2cMasterProtocolGuid
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
index 098a4dbd324e..91c1b66ea1f8 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
@@ -183,7 +183,7 @@ PlatformDxeEntryPoint (
// through the I2C driver stack (which cannot be used at runtime)
//
Status = gBS->InstallProtocolInterface (&Handle,
- &gPcf8563RealTimeClockLibI2cMasterProtolGuid,
+ &gPcf8563RealTimeClockLibI2cMasterProtocolGuid,
EFI_NATIVE_INTERFACE, NULL);
ASSERT_EFI_ERROR (Status);
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
index 766f4041c826..4d6a1d637922 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
@@ -53,7 +53,7 @@ [Guids]
[Protocols]
gEdkiiNonDiscoverableDeviceProtocolGuid ## PRODUCES
gEfiPciIoProtocolGuid ## CONSUMES
- gPcf8563RealTimeClockLibI2cMasterProtolGuid ## PRODUCES
+ gPcf8563RealTimeClockLibI2cMasterProtocolGuid ## PRODUCES
[FixedPcd]
gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase
--
2.11.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH edk2-platforms 2/8] Silicon: fix typo in gPcf8563RealTimeClockLibI2cMasterProtocolGuid
2018-01-25 12:27 ` [PATCH edk2-platforms 2/8] Silicon: fix typo in gPcf8563RealTimeClockLibI2cMasterProtocolGuid Ard Biesheuvel
@ 2018-01-25 12:51 ` Leif Lindholm
0 siblings, 0 replies; 18+ messages in thread
From: Leif Lindholm @ 2018-01-25 12:51 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel
On Thu, Jan 25, 2018 at 12:27:30PM +0000, Ard Biesheuvel wrote:
> Do a global replace of gPcf8563RealTimeClockLibI2cMasterProtolGuid with
> gPcf8563RealTimeClockLibI2cMasterProtocolGuid.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c | 2 +-
> Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec | 2 +-
> Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf | 4 ++--
> Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | 2 +-
> Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 +-
> 5 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
> index 67f8e7de4025..6bc4aef28849 100644
> --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
> +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
> @@ -373,7 +373,7 @@ LibRtcInitialize (
> //
> BufferSize = sizeof (EFI_HANDLE);
> Status = gBS->LocateHandle (ByProtocol,
> - &gPcf8563RealTimeClockLibI2cMasterProtolGuid, NULL,
> + &gPcf8563RealTimeClockLibI2cMasterProtocolGuid, NULL,
> &BufferSize, &mI2cMasterHandle);
> ASSERT_EFI_ERROR (Status);
>
> diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec
> index 3849056f164a..94c4a3f1ef4c 100644
> --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec
> +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec
> @@ -22,7 +22,7 @@ [Guids]
> gPcf8563RealTimeClockLibTokenSpaceGuid = { 0xaaf5b169, 0x93a0, 0x4d60, { 0xba, 0xe4, 0x06, 0x07, 0x92, 0x8e, 0x63, 0xdd }}
>
> [Protocols]
> - gPcf8563RealTimeClockLibI2cMasterProtolGuid = { 0xa6af18ae, 0x3bd5, 0x4af9, { 0xbb, 0x6a, 0xdb, 0x85, 0x07, 0x62, 0x81, 0x38 }}
> + gPcf8563RealTimeClockLibI2cMasterProtocolGuid = { 0xa6af18ae, 0x3bd5, 0x4af9, { 0xbb, 0x6a, 0xdb, 0x85, 0x07, 0x62, 0x81, 0x38 }}
>
> [PcdsFixedAtBuild]
> gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51|UINT8|0x00000001
> diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
> index 9907e343ba78..1a9a6f6c9cf3 100644
> --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
> +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
> @@ -42,11 +42,11 @@ [Guids]
> [Protocols]
> gEfiDriverBindingProtocolGuid ## CONSUMES
> gEfiI2cMasterProtocolGuid ## CONSUMES
> - gPcf8563RealTimeClockLibI2cMasterProtolGuid ## CONSUMES
> + gPcf8563RealTimeClockLibI2cMasterProtocolGuid ## CONSUMES
>
> [FixedPcd]
> gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress
> gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cBusFrequency
>
> [Depex]
> - gPcf8563RealTimeClockLibI2cMasterProtolGuid
> + gPcf8563RealTimeClockLibI2cMasterProtocolGuid
> diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
> index 098a4dbd324e..91c1b66ea1f8 100644
> --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
> +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
> @@ -183,7 +183,7 @@ PlatformDxeEntryPoint (
> // through the I2C driver stack (which cannot be used at runtime)
> //
> Status = gBS->InstallProtocolInterface (&Handle,
> - &gPcf8563RealTimeClockLibI2cMasterProtolGuid,
> + &gPcf8563RealTimeClockLibI2cMasterProtocolGuid,
> EFI_NATIVE_INTERFACE, NULL);
> ASSERT_EFI_ERROR (Status);
>
> diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
> index 766f4041c826..4d6a1d637922 100644
> --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
> +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
> @@ -53,7 +53,7 @@ [Guids]
> [Protocols]
> gEdkiiNonDiscoverableDeviceProtocolGuid ## PRODUCES
> gEfiPciIoProtocolGuid ## CONSUMES
> - gPcf8563RealTimeClockLibI2cMasterProtolGuid ## PRODUCES
> + gPcf8563RealTimeClockLibI2cMasterProtocolGuid ## PRODUCES
>
> [FixedPcd]
> gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase
> --
> 2.11.0
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH edk2-platforms 3/8] Silicon/NXP/Pcf8563RealTimeClockLib: avoid driver binding protocol
2018-01-25 12:27 [PATCH edk2-platforms 0/8] Socionext SynQuacer updates Ard Biesheuvel
2018-01-25 12:27 ` [PATCH edk2-platforms 1/8] Silicon/SynQuacer/PlatformDxe: enable spread spectrum mode for ASM1061 SATA Ard Biesheuvel
2018-01-25 12:27 ` [PATCH edk2-platforms 2/8] Silicon: fix typo in gPcf8563RealTimeClockLibI2cMasterProtocolGuid Ard Biesheuvel
@ 2018-01-25 12:27 ` Ard Biesheuvel
2018-01-25 12:54 ` Leif Lindholm
2018-01-25 12:27 ` [PATCH edk2-platforms 4/8] Silicon/SynQuacerI2cDxe: remove spurious format specifier Ard Biesheuvel
` (5 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Ard Biesheuvel @ 2018-01-25 12:27 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, Ard Biesheuvel
Instead of registering a notification callback on the driver binding
protocol, and attempting to connect our I2C master handle each time
a new driver is registered, switch to the more obvious approach of
registering a notification callback on the I2C master protocol directly.
The original code was written under the assumption that it would make
the RTC available at an earlier time, but given that all handles that
are created during the execution of a driver entry point are connected
by DXE core right away (i.e., before StartImage() returns), this is not
really necessary, and in fact, may result in the driver already having
been connected by the time we attempt to connect it.
Note that it is now up to the platform to ensure that ConnectController()
is called for the handle if DXE core does not call it by itself, or does
call it but at a time when no I2C master protocol driver is available
yet.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c | 31 ++++++++------------
Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf | 1 -
2 files changed, 13 insertions(+), 19 deletions(-)
diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
index 6bc4aef28849..fb58e1feb424 100644
--- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
+++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
@@ -41,7 +41,7 @@
#define EPOCH_BASE 2000
STATIC EFI_HANDLE mI2cMasterHandle;
-STATIC VOID *mDriverEventRegistration;
+STATIC VOID *mI2cMasterEventRegistration;
STATIC EFI_I2C_MASTER_PROTOCOL *mI2cMaster;
STATIC EFI_EVENT mRtcVirtualAddrChangeEvent;
@@ -263,12 +263,12 @@ LibSetWakeupTime (
STATIC
VOID
-DriverRegistrationEvent (
+I2cMasterRegistrationEvent (
IN EFI_EVENT Event,
IN VOID *Context
)
{
- EFI_HANDLE Handle[2];
+ EFI_HANDLE Handle;
UINTN BufferSize;
EFI_STATUS Status;
EFI_I2C_MASTER_PROTOCOL *I2cMaster;
@@ -280,10 +280,10 @@ DriverRegistrationEvent (
do {
BufferSize = sizeof (EFI_HANDLE);
Status = gBS->LocateHandle (ByRegisterNotify,
- &gEfiDriverBindingProtocolGuid,
- mDriverEventRegistration,
+ &gEfiI2cMasterProtocolGuid,
+ mI2cMasterEventRegistration,
&BufferSize,
- Handle);
+ &Handle);
if (EFI_ERROR (Status)) {
if (Status != EFI_NOT_FOUND) {
DEBUG ((DEBUG_WARN, "%a: gBS->LocateHandle () returned %r\n",
@@ -292,12 +292,7 @@ DriverRegistrationEvent (
break;
}
- //
- // Check if we can connect our handle to this driver.
- //
- Handle[1] = NULL;
- Status = gBS->ConnectController (mI2cMasterHandle, Handle, NULL, FALSE);
- if (EFI_ERROR (Status)) {
+ if (Handle != mI2cMasterHandle) {
continue;
}
@@ -378,16 +373,16 @@ LibRtcInitialize (
ASSERT_EFI_ERROR (Status);
//
- // Register a protocol registration notification callback on the driver
- // binding protocol so we can attempt to connect our I2C master to it
- // as soon as it appears.
+ // Register a protocol registration notification callback on the I2C master
+ // protocol. This will notify us even if the protocol instance we are looking
+ // for has already been installed.
//
EfiCreateProtocolNotifyEvent (
- &gEfiDriverBindingProtocolGuid,
+ &gEfiI2cMasterProtocolGuid,
TPL_CALLBACK,
- DriverRegistrationEvent,
+ I2cMasterRegistrationEvent,
NULL,
- &mDriverEventRegistration);
+ &mI2cMasterEventRegistration);
//
// Register for the virtual address change event
diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
index 1a9a6f6c9cf3..e232902c6b5d 100644
--- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
+++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
@@ -40,7 +40,6 @@ [Guids]
gEfiEventVirtualAddressChangeGuid
[Protocols]
- gEfiDriverBindingProtocolGuid ## CONSUMES
gEfiI2cMasterProtocolGuid ## CONSUMES
gPcf8563RealTimeClockLibI2cMasterProtocolGuid ## CONSUMES
--
2.11.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH edk2-platforms 3/8] Silicon/NXP/Pcf8563RealTimeClockLib: avoid driver binding protocol
2018-01-25 12:27 ` [PATCH edk2-platforms 3/8] Silicon/NXP/Pcf8563RealTimeClockLib: avoid driver binding protocol Ard Biesheuvel
@ 2018-01-25 12:54 ` Leif Lindholm
2018-01-25 13:07 ` Ard Biesheuvel
0 siblings, 1 reply; 18+ messages in thread
From: Leif Lindholm @ 2018-01-25 12:54 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel
On Thu, Jan 25, 2018 at 12:27:31PM +0000, Ard Biesheuvel wrote:
> Instead of registering a notification callback on the driver binding
> protocol, and attempting to connect our I2C master handle each time
> a new driver is registered, switch to the more obvious approach of
> registering a notification callback on the I2C master protocol directly.
>
> The original code was written under the assumption that it would make
> the RTC available at an earlier time, but given that all handles that
> are created during the execution of a driver entry point are connected
> by DXE core right away (i.e., before StartImage() returns), this is not
> really necessary, and in fact, may result in the driver already having
> been connected by the time we attempt to connect it.
>
> Note that it is now up to the platform to ensure that ConnectController()
> is called for the handle if DXE core does not call it by itself, or does
> call it but at a time when no I2C master protocol driver is available
> yet.
Presumably the platforms in edk2-platforms using this library already
follow these constraints?
If so:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c | 31 ++++++++------------
> Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf | 1 -
> 2 files changed, 13 insertions(+), 19 deletions(-)
>
> diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
> index 6bc4aef28849..fb58e1feb424 100644
> --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
> +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
> @@ -41,7 +41,7 @@
> #define EPOCH_BASE 2000
>
> STATIC EFI_HANDLE mI2cMasterHandle;
> -STATIC VOID *mDriverEventRegistration;
> +STATIC VOID *mI2cMasterEventRegistration;
> STATIC EFI_I2C_MASTER_PROTOCOL *mI2cMaster;
> STATIC EFI_EVENT mRtcVirtualAddrChangeEvent;
>
> @@ -263,12 +263,12 @@ LibSetWakeupTime (
>
> STATIC
> VOID
> -DriverRegistrationEvent (
> +I2cMasterRegistrationEvent (
> IN EFI_EVENT Event,
> IN VOID *Context
> )
> {
> - EFI_HANDLE Handle[2];
> + EFI_HANDLE Handle;
> UINTN BufferSize;
> EFI_STATUS Status;
> EFI_I2C_MASTER_PROTOCOL *I2cMaster;
> @@ -280,10 +280,10 @@ DriverRegistrationEvent (
> do {
> BufferSize = sizeof (EFI_HANDLE);
> Status = gBS->LocateHandle (ByRegisterNotify,
> - &gEfiDriverBindingProtocolGuid,
> - mDriverEventRegistration,
> + &gEfiI2cMasterProtocolGuid,
> + mI2cMasterEventRegistration,
> &BufferSize,
> - Handle);
> + &Handle);
> if (EFI_ERROR (Status)) {
> if (Status != EFI_NOT_FOUND) {
> DEBUG ((DEBUG_WARN, "%a: gBS->LocateHandle () returned %r\n",
> @@ -292,12 +292,7 @@ DriverRegistrationEvent (
> break;
> }
>
> - //
> - // Check if we can connect our handle to this driver.
> - //
> - Handle[1] = NULL;
> - Status = gBS->ConnectController (mI2cMasterHandle, Handle, NULL, FALSE);
> - if (EFI_ERROR (Status)) {
> + if (Handle != mI2cMasterHandle) {
> continue;
> }
>
> @@ -378,16 +373,16 @@ LibRtcInitialize (
> ASSERT_EFI_ERROR (Status);
>
> //
> - // Register a protocol registration notification callback on the driver
> - // binding protocol so we can attempt to connect our I2C master to it
> - // as soon as it appears.
> + // Register a protocol registration notification callback on the I2C master
> + // protocol. This will notify us even if the protocol instance we are looking
> + // for has already been installed.
> //
> EfiCreateProtocolNotifyEvent (
> - &gEfiDriverBindingProtocolGuid,
> + &gEfiI2cMasterProtocolGuid,
> TPL_CALLBACK,
> - DriverRegistrationEvent,
> + I2cMasterRegistrationEvent,
> NULL,
> - &mDriverEventRegistration);
> + &mI2cMasterEventRegistration);
>
> //
> // Register for the virtual address change event
> diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
> index 1a9a6f6c9cf3..e232902c6b5d 100644
> --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
> +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
> @@ -40,7 +40,6 @@ [Guids]
> gEfiEventVirtualAddressChangeGuid
>
> [Protocols]
> - gEfiDriverBindingProtocolGuid ## CONSUMES
> gEfiI2cMasterProtocolGuid ## CONSUMES
> gPcf8563RealTimeClockLibI2cMasterProtocolGuid ## CONSUMES
>
> --
> 2.11.0
>
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH edk2-platforms 3/8] Silicon/NXP/Pcf8563RealTimeClockLib: avoid driver binding protocol
2018-01-25 12:54 ` Leif Lindholm
@ 2018-01-25 13:07 ` Ard Biesheuvel
0 siblings, 0 replies; 18+ messages in thread
From: Ard Biesheuvel @ 2018-01-25 13:07 UTC (permalink / raw)
To: Leif Lindholm; +Cc: edk2-devel@lists.01.org
On 25 January 2018 at 12:54, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Thu, Jan 25, 2018 at 12:27:31PM +0000, Ard Biesheuvel wrote:
>> Instead of registering a notification callback on the driver binding
>> protocol, and attempting to connect our I2C master handle each time
>> a new driver is registered, switch to the more obvious approach of
>> registering a notification callback on the I2C master protocol directly.
>>
>> The original code was written under the assumption that it would make
>> the RTC available at an earlier time, but given that all handles that
>> are created during the execution of a driver entry point are connected
>> by DXE core right away (i.e., before StartImage() returns), this is not
>> really necessary, and in fact, may result in the driver already having
>> been connected by the time we attempt to connect it.
>>
>> Note that it is now up to the platform to ensure that ConnectController()
>> is called for the handle if DXE core does not call it by itself, or does
>> call it but at a time when no I2C master protocol driver is available
>> yet.
>
> Presumably the platforms in edk2-platforms using this library already
> follow these constraints?
>
There aren't any. But I did CC the NXP guys on this patch when I sent
it the first time around, to give them the head's up that they
probably shouldn't copy the original pattern.
> If so:
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
Thanks.
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>> Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c | 31 ++++++++------------
>> Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf | 1 -
>> 2 files changed, 13 insertions(+), 19 deletions(-)
>>
>> diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
>> index 6bc4aef28849..fb58e1feb424 100644
>> --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
>> +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
>> @@ -41,7 +41,7 @@
>> #define EPOCH_BASE 2000
>>
>> STATIC EFI_HANDLE mI2cMasterHandle;
>> -STATIC VOID *mDriverEventRegistration;
>> +STATIC VOID *mI2cMasterEventRegistration;
>> STATIC EFI_I2C_MASTER_PROTOCOL *mI2cMaster;
>> STATIC EFI_EVENT mRtcVirtualAddrChangeEvent;
>>
>> @@ -263,12 +263,12 @@ LibSetWakeupTime (
>>
>> STATIC
>> VOID
>> -DriverRegistrationEvent (
>> +I2cMasterRegistrationEvent (
>> IN EFI_EVENT Event,
>> IN VOID *Context
>> )
>> {
>> - EFI_HANDLE Handle[2];
>> + EFI_HANDLE Handle;
>> UINTN BufferSize;
>> EFI_STATUS Status;
>> EFI_I2C_MASTER_PROTOCOL *I2cMaster;
>> @@ -280,10 +280,10 @@ DriverRegistrationEvent (
>> do {
>> BufferSize = sizeof (EFI_HANDLE);
>> Status = gBS->LocateHandle (ByRegisterNotify,
>> - &gEfiDriverBindingProtocolGuid,
>> - mDriverEventRegistration,
>> + &gEfiI2cMasterProtocolGuid,
>> + mI2cMasterEventRegistration,
>> &BufferSize,
>> - Handle);
>> + &Handle);
>> if (EFI_ERROR (Status)) {
>> if (Status != EFI_NOT_FOUND) {
>> DEBUG ((DEBUG_WARN, "%a: gBS->LocateHandle () returned %r\n",
>> @@ -292,12 +292,7 @@ DriverRegistrationEvent (
>> break;
>> }
>>
>> - //
>> - // Check if we can connect our handle to this driver.
>> - //
>> - Handle[1] = NULL;
>> - Status = gBS->ConnectController (mI2cMasterHandle, Handle, NULL, FALSE);
>> - if (EFI_ERROR (Status)) {
>> + if (Handle != mI2cMasterHandle) {
>> continue;
>> }
>>
>> @@ -378,16 +373,16 @@ LibRtcInitialize (
>> ASSERT_EFI_ERROR (Status);
>>
>> //
>> - // Register a protocol registration notification callback on the driver
>> - // binding protocol so we can attempt to connect our I2C master to it
>> - // as soon as it appears.
>> + // Register a protocol registration notification callback on the I2C master
>> + // protocol. This will notify us even if the protocol instance we are looking
>> + // for has already been installed.
>> //
>> EfiCreateProtocolNotifyEvent (
>> - &gEfiDriverBindingProtocolGuid,
>> + &gEfiI2cMasterProtocolGuid,
>> TPL_CALLBACK,
>> - DriverRegistrationEvent,
>> + I2cMasterRegistrationEvent,
>> NULL,
>> - &mDriverEventRegistration);
>> + &mI2cMasterEventRegistration);
>>
>> //
>> // Register for the virtual address change event
>> diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
>> index 1a9a6f6c9cf3..e232902c6b5d 100644
>> --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
>> +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf
>> @@ -40,7 +40,6 @@ [Guids]
>> gEfiEventVirtualAddressChangeGuid
>>
>> [Protocols]
>> - gEfiDriverBindingProtocolGuid ## CONSUMES
>> gEfiI2cMasterProtocolGuid ## CONSUMES
>> gPcf8563RealTimeClockLibI2cMasterProtocolGuid ## CONSUMES
>>
>> --
>> 2.11.0
>>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH edk2-platforms 4/8] Silicon/SynQuacerI2cDxe: remove spurious format specifier
2018-01-25 12:27 [PATCH edk2-platforms 0/8] Socionext SynQuacer updates Ard Biesheuvel
` (2 preceding siblings ...)
2018-01-25 12:27 ` [PATCH edk2-platforms 3/8] Silicon/NXP/Pcf8563RealTimeClockLib: avoid driver binding protocol Ard Biesheuvel
@ 2018-01-25 12:27 ` Ard Biesheuvel
2018-01-25 12:55 ` Leif Lindholm
2018-01-25 12:27 ` [PATCH edk2-platforms 5/8] Silicon/SynQuacer: load I2C driver before platform DXE driver Ard Biesheuvel
` (4 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Ard Biesheuvel @ 2018-01-25 12:27 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, Ard Biesheuvel
Remove a %r without an associated parameter.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
index c3703dfb6c33..46c512a20151 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
@@ -335,7 +335,7 @@ SynQuacerI2cStartRequest (
}
if (MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR) & F_I2C_BSR_LRB) {
- BOOTTIME_DEBUG ((DEBUG_WARN, "%a: No ack received - %r\n", __FUNCTION__));
+ BOOTTIME_DEBUG ((DEBUG_WARN, "%a: No ack received\n", __FUNCTION__));
Status = EFI_DEVICE_ERROR;
break;
}
--
2.11.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH edk2-platforms 4/8] Silicon/SynQuacerI2cDxe: remove spurious format specifier
2018-01-25 12:27 ` [PATCH edk2-platforms 4/8] Silicon/SynQuacerI2cDxe: remove spurious format specifier Ard Biesheuvel
@ 2018-01-25 12:55 ` Leif Lindholm
0 siblings, 0 replies; 18+ messages in thread
From: Leif Lindholm @ 2018-01-25 12:55 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel
On Thu, Jan 25, 2018 at 12:27:32PM +0000, Ard Biesheuvel wrote:
> Remove a %r without an associated parameter.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
> index c3703dfb6c33..46c512a20151 100644
> --- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
> +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
> @@ -335,7 +335,7 @@ SynQuacerI2cStartRequest (
> }
>
> if (MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR) & F_I2C_BSR_LRB) {
> - BOOTTIME_DEBUG ((DEBUG_WARN, "%a: No ack received - %r\n", __FUNCTION__));
> + BOOTTIME_DEBUG ((DEBUG_WARN, "%a: No ack received\n", __FUNCTION__));
> Status = EFI_DEVICE_ERROR;
> break;
> }
> --
> 2.11.0
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH edk2-platforms 5/8] Silicon/SynQuacer: load I2C driver before platform DXE driver
2018-01-25 12:27 [PATCH edk2-platforms 0/8] Socionext SynQuacer updates Ard Biesheuvel
` (3 preceding siblings ...)
2018-01-25 12:27 ` [PATCH edk2-platforms 4/8] Silicon/SynQuacerI2cDxe: remove spurious format specifier Ard Biesheuvel
@ 2018-01-25 12:27 ` Ard Biesheuvel
2018-01-25 12:57 ` Leif Lindholm
2018-01-25 12:27 ` [PATCH edk2-platforms 6/8] Silicon/SynQuacer/DeviceTree: align uart DT nodes Ard Biesheuvel
` (3 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Ard Biesheuvel @ 2018-01-25 12:27 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, Ard Biesheuvel
To ensure that the I2C master protocol is installed immediately onto
the handles created by PlatformDxe in its entry point, force the
SynQuacerI2cDxe driver to be loaded before PlatformDxe. These handles
are recursively connected by the DXE core as soon as they appear, and
so ensuring that the I2C master protocol driver is available at this
time will ensure that these handles will be connected to it right away.
This is useful when implementations of architectural protocols such as
RTC or the EFI variable store, which should become available long before
the ordinary dispatch of UEFI driver model drivers is started at the end
of DXE, are based on I2C.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 +-
Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf | 2 +-
Silicon/Socionext/SynQuacer/SynQuacer.dec | 2 ++
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
index 4d6a1d637922..f075957d7456 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x0001001A
BASE_NAME = PlatformDxe
- FILE_GUID = ac422cc1-d916-489a-b165-536fdfc633c2
+ FILE_GUID = ac422cc1-d916-489a-b165-536fdfc633c2 # gSynQuacerPlatformDxeFileGuid
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = PlatformDxeEntryPoint
diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf
index fa715366878c..325816ba0b88 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf
@@ -56,4 +56,4 @@ [FixedPcd]
gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock
[Depex]
- TRUE
+ BEFORE gSynQuacerPlatformDxeFileGuid
diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec
index a21f12b5bc32..76529e3c2164 100644
--- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
+++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
@@ -25,6 +25,8 @@ [Guids]
gSynQuacerNonDiscoverableI2cMasterGuid = { 0x364ee675, 0x9e44, 0x42b7, { 0xa5, 0xe4, 0x92, 0x84, 0xdb, 0x85, 0xda, 0x09 } }
gSynQuacerNonDiscoverableRuntimeI2cMasterGuid = { 0x5f35aa9b, 0x8c6f, 0x4828, { 0xbd, 0x44, 0x7c, 0xc0, 0xeb, 0x2d, 0xfe, 0xb9 } }
+ gSynQuacerPlatformDxeFileGuid = { 0xac422cc1, 0xd916, 0x489a, { 0xb1, 0x65, 0x53, 0x6f, 0xdf, 0xc6, 0x33, 0xc2 } }
+
[Ppis]
gSynQuacerDramInfoPpiGuid = { 0x3e1d7356, 0xdda4, 0x4b1a, { 0x93, 0x46, 0xbf, 0x89, 0x1c, 0x86, 0x46, 0xcc } }
--
2.11.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH edk2-platforms 5/8] Silicon/SynQuacer: load I2C driver before platform DXE driver
2018-01-25 12:27 ` [PATCH edk2-platforms 5/8] Silicon/SynQuacer: load I2C driver before platform DXE driver Ard Biesheuvel
@ 2018-01-25 12:57 ` Leif Lindholm
0 siblings, 0 replies; 18+ messages in thread
From: Leif Lindholm @ 2018-01-25 12:57 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel
On Thu, Jan 25, 2018 at 12:27:33PM +0000, Ard Biesheuvel wrote:
> To ensure that the I2C master protocol is installed immediately onto
> the handles created by PlatformDxe in its entry point, force the
> SynQuacerI2cDxe driver to be loaded before PlatformDxe. These handles
> are recursively connected by the DXE core as soon as they appear, and
> so ensuring that the I2C master protocol driver is available at this
> time will ensure that these handles will be connected to it right away.
>
> This is useful when implementations of architectural protocols such as
> RTC or the EFI variable store, which should become available long before
> the ordinary dispatch of UEFI driver model drivers is started at the end
> of DXE, are based on I2C.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 +-
> Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf | 2 +-
> Silicon/Socionext/SynQuacer/SynQuacer.dec | 2 ++
> 3 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
> index 4d6a1d637922..f075957d7456 100644
> --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
> +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
> @@ -17,7 +17,7 @@
> [Defines]
> INF_VERSION = 0x0001001A
> BASE_NAME = PlatformDxe
> - FILE_GUID = ac422cc1-d916-489a-b165-536fdfc633c2
> + FILE_GUID = ac422cc1-d916-489a-b165-536fdfc633c2 # gSynQuacerPlatformDxeFileGuid
> MODULE_TYPE = DXE_DRIVER
> VERSION_STRING = 1.0
> ENTRY_POINT = PlatformDxeEntryPoint
> diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf
> index fa715366878c..325816ba0b88 100644
> --- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf
> +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf
> @@ -56,4 +56,4 @@ [FixedPcd]
> gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock
>
> [Depex]
> - TRUE
> + BEFORE gSynQuacerPlatformDxeFileGuid
> diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> index a21f12b5bc32..76529e3c2164 100644
> --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
> +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> @@ -25,6 +25,8 @@ [Guids]
> gSynQuacerNonDiscoverableI2cMasterGuid = { 0x364ee675, 0x9e44, 0x42b7, { 0xa5, 0xe4, 0x92, 0x84, 0xdb, 0x85, 0xda, 0x09 } }
> gSynQuacerNonDiscoverableRuntimeI2cMasterGuid = { 0x5f35aa9b, 0x8c6f, 0x4828, { 0xbd, 0x44, 0x7c, 0xc0, 0xeb, 0x2d, 0xfe, 0xb9 } }
>
> + gSynQuacerPlatformDxeFileGuid = { 0xac422cc1, 0xd916, 0x489a, { 0xb1, 0x65, 0x53, 0x6f, 0xdf, 0xc6, 0x33, 0xc2 } }
> +
> [Ppis]
> gSynQuacerDramInfoPpiGuid = { 0x3e1d7356, 0xdda4, 0x4b1a, { 0x93, 0x46, 0xbf, 0x89, 0x1c, 0x86, 0x46, 0xcc } }
>
> --
> 2.11.0
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH edk2-platforms 6/8] Silicon/SynQuacer/DeviceTree: align uart DT nodes
2018-01-25 12:27 [PATCH edk2-platforms 0/8] Socionext SynQuacer updates Ard Biesheuvel
` (4 preceding siblings ...)
2018-01-25 12:27 ` [PATCH edk2-platforms 5/8] Silicon/SynQuacer: load I2C driver before platform DXE driver Ard Biesheuvel
@ 2018-01-25 12:27 ` Ard Biesheuvel
2018-01-25 12:58 ` Leif Lindholm
2018-01-25 12:27 ` [PATCH edk2-platforms 7/8] Silicon/SynQuacer/DeviceTree: update NETSEC DT node to latest binding Ard Biesheuvel
` (2 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Ard Biesheuvel @ 2018-01-25 12:27 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, Ard Biesheuvel
Align the UART DT nodes:
- use 'uart' not 'fuart' as node name for the second serial port
- create an alias 'serial1' for the second serial port
- use UART clock reference instead of hardcoded frequency
- split 'clocks' property into 1 cell per phandle
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index 37a3981f0360..7c3518facb98 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -32,6 +32,7 @@
aliases {
serial0 = &soc_uart0;
+ serial1 = &fuart;
};
chosen {
@@ -436,15 +437,16 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x2a400000 0x0 0x1000>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_uart &clk_apb>;
+ clocks = <&clk_uart>, <&clk_apb>;
clock-names = "uartclk", "apb_pclk";
};
- fuart: fuart@51040000 {
+ fuart: uart@51040000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x51040000 0x0 0x1000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <62500000>;
+ clocks = <&clk_uart>, <&clk_apb>;
+ clock-names = "baudclk", "apb_pclk";
reg-io-width = <4>;
reg-shift = <2>;
};
--
2.11.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH edk2-platforms 6/8] Silicon/SynQuacer/DeviceTree: align uart DT nodes
2018-01-25 12:27 ` [PATCH edk2-platforms 6/8] Silicon/SynQuacer/DeviceTree: align uart DT nodes Ard Biesheuvel
@ 2018-01-25 12:58 ` Leif Lindholm
0 siblings, 0 replies; 18+ messages in thread
From: Leif Lindholm @ 2018-01-25 12:58 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel
On Thu, Jan 25, 2018 at 12:27:34PM +0000, Ard Biesheuvel wrote:
> Align the UART DT nodes:
> - use 'uart' not 'fuart' as node name for the second serial port
> - create an alias 'serial1' for the second serial port
> - use UART clock reference instead of hardcoded frequency
> - split 'clocks' property into 1 cell per phandle
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> index 37a3981f0360..7c3518facb98 100644
> --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> @@ -32,6 +32,7 @@
>
> aliases {
> serial0 = &soc_uart0;
> + serial1 = &fuart;
> };
>
> chosen {
> @@ -436,15 +437,16 @@
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x0 0x2a400000 0x0 0x1000>;
> interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk_uart &clk_apb>;
> + clocks = <&clk_uart>, <&clk_apb>;
> clock-names = "uartclk", "apb_pclk";
> };
>
> - fuart: fuart@51040000 {
> + fuart: uart@51040000 {
> compatible = "snps,dw-apb-uart";
> reg = <0x0 0x51040000 0x0 0x1000>;
> interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> - clock-frequency = <62500000>;
> + clocks = <&clk_uart>, <&clk_apb>;
> + clock-names = "baudclk", "apb_pclk";
> reg-io-width = <4>;
> reg-shift = <2>;
> };
> --
> 2.11.0
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH edk2-platforms 7/8] Silicon/SynQuacer/DeviceTree: update NETSEC DT node to latest binding
2018-01-25 12:27 [PATCH edk2-platforms 0/8] Socionext SynQuacer updates Ard Biesheuvel
` (5 preceding siblings ...)
2018-01-25 12:27 ` [PATCH edk2-platforms 6/8] Silicon/SynQuacer/DeviceTree: align uart DT nodes Ard Biesheuvel
@ 2018-01-25 12:27 ` Ard Biesheuvel
2018-01-25 13:00 ` Leif Lindholm
2018-01-25 12:27 ` [PATCH edk2-platforms 8/8] Silicon/Socionext/SynQuacer: implement menu option to set max PCIe speed Ard Biesheuvel
2018-01-25 18:51 ` [PATCH edk2-platforms 0/8] Socionext SynQuacer updates Ard Biesheuvel
8 siblings, 1 reply; 18+ messages in thread
From: Ard Biesheuvel @ 2018-01-25 12:27 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, Ard Biesheuvel
The upstream version of the Linux NETSEC driver expects the PHY DT
node to appear under a MDIO subnode, so fix this in the device tree.
Fix the node name as well, this should be 'ethernet' not 'netsec',
and add a clock-names property describing the single clock reference
as 'phy_ref_clk'.
Also, move the PHY subnode into the per-platform .dts file so we can
set the unit address in the node name. This is necessary because recent
versions of the DT compiler are more finicky about this.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts | 7 +++++
Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 30 +++++++++-----------
Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts | 7 +++++
3 files changed, 28 insertions(+), 16 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
index d2cd7ef90e6f..488c51a0f793 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
@@ -44,3 +44,10 @@
"GPIO-K", "GPIO-L", "PEC-PD26", "PEC-PD27",
"PEC-PD28", "PEC-PD29", "PEC-PD30", "PEC-PD31";
};
+
+&mdio_netsec {
+ phy_netsec: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index 7c3518facb98..6ee7a0b7ccb4 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -457,25 +457,23 @@
#clock-cells = <0>;
};
- eth0: netsec@522D0000 {
- compatible = "socionext,synquacer-netsec";
- reg = <0 0x522d0000 0x0 0x10000>,
- <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>;
- interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_netsec>;
- phy-mode = "rgmii";
- max-speed = <1000>;
- max-frame-size = <9000>;
- phy-handle = <ðphy0>;
- dma-coherent;
+ ethernet@522d0000 {
+ compatible = "socionext,synquacer-netsec";
+ reg = <0 0x522d0000 0x0 0x10000>,
+ <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_netsec>;
+ clock-names = "phy_ref_clk";
+ phy-mode = "rgmii";
+ max-speed = <1000>;
+ max-frame-size = <9000>;
+ phy-handle = <&phy_netsec>;
+ dma-coherent;
+ mdio_netsec: mdio {
#address-cells = <1>;
#size-cells = <0>;
-
- ethphy0: ethernet-phy {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <FixedPcdGet32 (PcdNetsecPhyAddress)>;
- };
+ };
};
smmu: iommu@582c0000 {
diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
index 132fd370a71b..97fddfedcb46 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
@@ -34,3 +34,10 @@
&sdhci {
status = "okay";
};
+
+&mdio_netsec {
+ phy_netsec: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH edk2-platforms 7/8] Silicon/SynQuacer/DeviceTree: update NETSEC DT node to latest binding
2018-01-25 12:27 ` [PATCH edk2-platforms 7/8] Silicon/SynQuacer/DeviceTree: update NETSEC DT node to latest binding Ard Biesheuvel
@ 2018-01-25 13:00 ` Leif Lindholm
2018-01-25 13:05 ` Ard Biesheuvel
0 siblings, 1 reply; 18+ messages in thread
From: Leif Lindholm @ 2018-01-25 13:00 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel
On Thu, Jan 25, 2018 at 12:27:35PM +0000, Ard Biesheuvel wrote:
> The upstream version of the Linux NETSEC driver expects the PHY DT
> node to appear under a MDIO subnode, so fix this in the device tree.
> Fix the node name as well, this should be 'ethernet' not 'netsec',
> and add a clock-names property describing the single clock reference
> as 'phy_ref_clk'.
>
> Also, move the PHY subnode into the per-platform .dts file so we can
> set the unit address in the node name. This is necessary because recent
> versions of the DT compiler are more finicky about this.
Presumably the only kernels this may break are using non-upstream code?
If so:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts | 7 +++++
> Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 30 +++++++++-----------
> Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts | 7 +++++
> 3 files changed, 28 insertions(+), 16 deletions(-)
>
> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
> index d2cd7ef90e6f..488c51a0f793 100644
> --- a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
> @@ -44,3 +44,10 @@
> "GPIO-K", "GPIO-L", "PEC-PD26", "PEC-PD27",
> "PEC-PD28", "PEC-PD29", "PEC-PD30", "PEC-PD31";
> };
> +
> +&mdio_netsec {
> + phy_netsec: ethernet-phy@7 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <7>;
> + };
> +};
> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> index 7c3518facb98..6ee7a0b7ccb4 100644
> --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> @@ -457,25 +457,23 @@
> #clock-cells = <0>;
> };
>
> - eth0: netsec@522D0000 {
> - compatible = "socionext,synquacer-netsec";
> - reg = <0 0x522d0000 0x0 0x10000>,
> - <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>;
> - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk_netsec>;
> - phy-mode = "rgmii";
> - max-speed = <1000>;
> - max-frame-size = <9000>;
> - phy-handle = <ðphy0>;
> - dma-coherent;
> + ethernet@522d0000 {
> + compatible = "socionext,synquacer-netsec";
> + reg = <0 0x522d0000 0x0 0x10000>,
> + <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>;
> + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk_netsec>;
> + clock-names = "phy_ref_clk";
> + phy-mode = "rgmii";
> + max-speed = <1000>;
> + max-frame-size = <9000>;
> + phy-handle = <&phy_netsec>;
> + dma-coherent;
>
> + mdio_netsec: mdio {
> #address-cells = <1>;
> #size-cells = <0>;
> -
> - ethphy0: ethernet-phy {
> - compatible = "ethernet-phy-ieee802.3-c22";
> - reg = <FixedPcdGet32 (PcdNetsecPhyAddress)>;
> - };
> + };
> };
>
> smmu: iommu@582c0000 {
> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
> index 132fd370a71b..97fddfedcb46 100644
> --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
> @@ -34,3 +34,10 @@
> &sdhci {
> status = "okay";
> };
> +
> +&mdio_netsec {
> + phy_netsec: ethernet-phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <1>;
> + };
> +};
> --
> 2.11.0
>
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH edk2-platforms 7/8] Silicon/SynQuacer/DeviceTree: update NETSEC DT node to latest binding
2018-01-25 13:00 ` Leif Lindholm
@ 2018-01-25 13:05 ` Ard Biesheuvel
0 siblings, 0 replies; 18+ messages in thread
From: Ard Biesheuvel @ 2018-01-25 13:05 UTC (permalink / raw)
To: Leif Lindholm; +Cc: edk2-devel@lists.01.org
On 25 January 2018 at 13:00, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Thu, Jan 25, 2018 at 12:27:35PM +0000, Ard Biesheuvel wrote:
>> The upstream version of the Linux NETSEC driver expects the PHY DT
>> node to appear under a MDIO subnode, so fix this in the device tree.
>> Fix the node name as well, this should be 'ethernet' not 'netsec',
>> and add a clock-names property describing the single clock reference
>> as 'phy_ref_clk'.
>>
>> Also, move the PHY subnode into the per-platform .dts file so we can
>> set the unit address in the node name. This is necessary because recent
>> versions of the DT compiler are more finicky about this.
>
> Presumably the only kernels this may break are using non-upstream code?
Yes. The upstream version is not quite upstream yet - it is now
[finally] queued, for inclusion in v4.16
> If so:
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
Thanks
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>> Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts | 7 +++++
>> Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 30 +++++++++-----------
>> Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts | 7 +++++
>> 3 files changed, 28 insertions(+), 16 deletions(-)
>>
>> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
>> index d2cd7ef90e6f..488c51a0f793 100644
>> --- a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
>> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts
>> @@ -44,3 +44,10 @@
>> "GPIO-K", "GPIO-L", "PEC-PD26", "PEC-PD27",
>> "PEC-PD28", "PEC-PD29", "PEC-PD30", "PEC-PD31";
>> };
>> +
>> +&mdio_netsec {
>> + phy_netsec: ethernet-phy@7 {
>> + compatible = "ethernet-phy-ieee802.3-c22";
>> + reg = <7>;
>> + };
>> +};
>> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
>> index 7c3518facb98..6ee7a0b7ccb4 100644
>> --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
>> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
>> @@ -457,25 +457,23 @@
>> #clock-cells = <0>;
>> };
>>
>> - eth0: netsec@522D0000 {
>> - compatible = "socionext,synquacer-netsec";
>> - reg = <0 0x522d0000 0x0 0x10000>,
>> - <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>;
>> - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
>> - clocks = <&clk_netsec>;
>> - phy-mode = "rgmii";
>> - max-speed = <1000>;
>> - max-frame-size = <9000>;
>> - phy-handle = <ðphy0>;
>> - dma-coherent;
>> + ethernet@522d0000 {
>> + compatible = "socionext,synquacer-netsec";
>> + reg = <0 0x522d0000 0x0 0x10000>,
>> + <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>;
>> + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clk_netsec>;
>> + clock-names = "phy_ref_clk";
>> + phy-mode = "rgmii";
>> + max-speed = <1000>;
>> + max-frame-size = <9000>;
>> + phy-handle = <&phy_netsec>;
>> + dma-coherent;
>>
>> + mdio_netsec: mdio {
>> #address-cells = <1>;
>> #size-cells = <0>;
>> -
>> - ethphy0: ethernet-phy {
>> - compatible = "ethernet-phy-ieee802.3-c22";
>> - reg = <FixedPcdGet32 (PcdNetsecPhyAddress)>;
>> - };
>> + };
>> };
>>
>> smmu: iommu@582c0000 {
>> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
>> index 132fd370a71b..97fddfedcb46 100644
>> --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
>> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts
>> @@ -34,3 +34,10 @@
>> &sdhci {
>> status = "okay";
>> };
>> +
>> +&mdio_netsec {
>> + phy_netsec: ethernet-phy@1 {
>> + compatible = "ethernet-phy-ieee802.3-c22";
>> + reg = <1>;
>> + };
>> +};
>> --
>> 2.11.0
>>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH edk2-platforms 8/8] Silicon/Socionext/SynQuacer: implement menu option to set max PCIe speed
2018-01-25 12:27 [PATCH edk2-platforms 0/8] Socionext SynQuacer updates Ard Biesheuvel
` (6 preceding siblings ...)
2018-01-25 12:27 ` [PATCH edk2-platforms 7/8] Silicon/SynQuacer/DeviceTree: update NETSEC DT node to latest binding Ard Biesheuvel
@ 2018-01-25 12:27 ` Ard Biesheuvel
2018-01-25 18:51 ` [PATCH edk2-platforms 0/8] Socionext SynQuacer updates Ard Biesheuvel
8 siblings, 0 replies; 18+ messages in thread
From: Ard Biesheuvel @ 2018-01-25 12:27 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, Ard Biesheuvel
Add menu options to the SynQuacer Platform menu screen to limit the
maximum PCIe link speed for each RC individually. This may be useful
to work around potential PCIe issues.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 2 +
Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 2 +
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c | 4 +-
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | 107 ++++++++++++++++++++
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h | 12 +++
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 11 ++
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni | 28 +++++
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr | 61 +++++++++++
Silicon/Socionext/SynQuacer/Include/Guid/SynQuacerPlatformFormSet.h | 23 +++++
Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h | 28 +++++
Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf | 2 +
Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLibConstructor.c | 25 ++++-
Silicon/Socionext/SynQuacer/SynQuacer.dec | 5 +
13 files changed, 304 insertions(+), 6 deletions(-)
diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
index 86685d1dec3b..2d46b4515749 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
@@ -405,6 +405,8 @@ [PcdsDynamicExDefault.common.DEFAULT]
[PcdsDynamicHii]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|30
+ gSynQuacerTokenSpaceGuid.PcdPlatformSettings|L"SynQuacerPlatformSettings"|gSynQuacerPlatformFormSetGuid|0x0|0x0|NV,BS
+
[PcdsDynamicDefault]
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x0000000000000000
gArmTokenSpaceGuid.PcdSystemMemorySize|0xFFFFFFFFFFFFFFFF
diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
index b4b9239143bc..263b6454ff72 100644
--- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
+++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
@@ -397,6 +397,8 @@ [PcdsDynamicExDefault.common.DEFAULT]
[PcdsDynamicHii]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|30
+ gSynQuacerTokenSpaceGuid.PcdPlatformSettings|L"SynQuacerPlatformSettings"|gSynQuacerPlatformFormSetGuid|0x0|0x0|NV,BS
+
[PcdsDynamicDefault]
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x0000000000000000
gArmTokenSpaceGuid.PcdSystemMemorySize|0xFFFFFFFFFFFFFFFF
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c
index 9af3dd942cdd..2a0fefbd423f 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/Pci.c
@@ -160,7 +160,9 @@ OnPciIoProtocolNotify (
// 2-port sibling of which samples were used in development) needs a
// little nudge to get it to train the downstream links at Gen2 speed.
//
- RetrainAsm1184eDownstreamPort (PciIo);
+ if (mHiiSettings->Pcie0MaxSpeed != PCIE_MAX_SPEED_GEN1) {
+ RetrainAsm1184eDownstreamPort (PciIo);
+ }
break;
}
}
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
index 91c1b66ea1f8..b60607d05861 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c
@@ -14,6 +14,36 @@
#include "PlatformDxe.h"
+UINT64 mHiiSettingsVal;
+SYNQUACER_PLATFORM_VARSTORE_DATA *mHiiSettings;
+
+typedef struct {
+ VENDOR_DEVICE_PATH VendorDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} HII_VENDOR_DEVICE_PATH;
+
+STATIC HII_VENDOR_DEVICE_PATH mPlatformDxeHiiVendorDevicePath = {
+ {
+ {
+ HARDWARE_DEVICE_PATH,
+ HW_VENDOR_DP,
+ {
+ (UINT8) (sizeof (VENDOR_DEVICE_PATH)),
+ (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8)
+ }
+ },
+ SYNQUACER_PLATFORM_FORMSET_GUID
+ },
+ {
+ END_DEVICE_PATH_TYPE,
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ {
+ (UINT8) (END_DEVICE_PATH_LENGTH),
+ (UINT8) ((END_DEVICE_PATH_LENGTH) >> 8)
+ }
+ }
+};
+
STATIC EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mNetsecDesc[] = {
{
ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc
@@ -144,6 +174,77 @@ SmmuEnableCoherentDma (
SMMU_SCR0_SHCFG_INNER | SMMU_SCR0_MTCFG | SMMU_SCR0_MEMATTR_INNER_OUTER_WB);
}
+STATIC
+EFI_STATUS
+InstallHiiPages (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_HII_HANDLE HiiHandle;
+ EFI_HANDLE DriverHandle;
+
+ DriverHandle = NULL;
+ Status = gBS->InstallMultipleProtocolInterfaces (&DriverHandle,
+ &gEfiDevicePathProtocolGuid,
+ &mPlatformDxeHiiVendorDevicePath,
+ NULL);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ HiiHandle = HiiAddPackages (&gSynQuacerPlatformFormSetGuid,
+ DriverHandle,
+ PlatformDxeStrings,
+ PlatformDxeHiiBin,
+ NULL);
+
+ if (HiiHandle == NULL) {
+ gBS->UninstallMultipleProtocolInterfaces (DriverHandle,
+ &gEfiDevicePathProtocolGuid,
+ &mPlatformDxeHiiVendorDevicePath,
+ NULL);
+ return EFI_OUT_OF_RESOURCES;
+ }
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+EnableSettingsForm (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINTN VarSize;
+ SYNQUACER_PLATFORM_VARSTORE_DATA Settings;
+
+ VarSize = sizeof (Settings);
+ Status = gRT->GetVariable (SYNQUACER_PLATFORM_VARIABLE_NAME,
+ &gSynQuacerPlatformFormSetGuid, NULL, &VarSize, &Settings);
+ if (Status == EFI_NOT_FOUND) {
+ //
+ // Variable does not exist yet - create it
+ //
+ SetMem (&Settings, sizeof (Settings), 0);
+ Status = gRT->SetVariable (SYNQUACER_PLATFORM_VARIABLE_NAME,
+ &gSynQuacerPlatformFormSetGuid,
+ EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ sizeof (Settings), &Settings);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "%a: EfiSetVariable failed - %r\n", __FUNCTION__,
+ Status));
+ return Status;
+ }
+ } else if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "%a: EfiGetVariable failed - %r\n", __FUNCTION__,
+ Status));
+ return Status;
+ }
+
+ return InstallHiiPages ();
+}
+
EFI_STATUS
EFIAPI
PlatformDxeEntryPoint (
@@ -156,6 +257,9 @@ PlatformDxeEntryPoint (
UINTN DtbSize;
EFI_HANDLE Handle;
+ mHiiSettingsVal = PcdGet64 (PcdPlatformSettings);
+ mHiiSettings = (SYNQUACER_PLATFORM_VARSTORE_DATA *)&mHiiSettingsVal;
+
Dtb = NULL;
Status = DtPlatformLoadDtb (&Dtb, &DtbSize);
if (!EFI_ERROR (Status)) {
@@ -197,5 +301,8 @@ PlatformDxeEntryPoint (
Status = RegisterPcieNotifier ();
ASSERT_EFI_ERROR (Status);
+ Status = EnableSettingsForm ();
+ ASSERT_EFI_ERROR (Status);
+
return EFI_SUCCESS;
}
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h
index d1dad2a3eace..6fc4970cf472 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h
@@ -16,18 +16,30 @@
#define __PLATFORM_DXE_H__
#include <PiDxe.h>
+#include <Guid/SynQuacerPlatformFormSet.h>
#include <IndustryStandard/Pci.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
#include <Library/DtPlatformDtbLoaderLib.h>
+#include <Library/HiiLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
#include <Platform/MemoryMap.h>
+#include <Platform/VarStore.h>
#include <Protocol/NonDiscoverableDevice.h>
#include <Protocol/PciIo.h>
+extern UINT8 PlatformDxeHiiBin[];
+extern UINT8 PlatformDxeStrings[];
+
+extern UINT64 mHiiSettingsVal;
+extern SYNQUACER_PLATFORM_VARSTORE_DATA *mHiiSettings;
+
EFI_STATUS
EFIAPI
RegisterPcieNotifier (
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
index f075957d7456..de21ba33df75 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf
@@ -25,6 +25,8 @@ [Defines]
[Sources]
Pci.c
PlatformDxe.c
+ PlatformDxeHii.uni
+ PlatformDxeHii.vfr
[Packages]
EmbeddedPkg/EmbeddedPkg.dec
@@ -37,18 +39,24 @@ [Packages]
[LibraryClasses]
BaseMemoryLib
DebugLib
+ DevicePathLib
DtPlatformDtbLoaderLib
+ HiiLib
IoLib
MemoryAllocationLib
+ PcdLib
UefiBootServicesTableLib
UefiDriverEntryPoint
UefiLib
+ UefiRuntimeServicesTableLib
[Guids]
+ gEfiHiiPlatformSetupFormsetGuid
gFdtTableGuid
gNetsecNonDiscoverableDeviceGuid
gSynQuacerNonDiscoverableI2cMasterGuid
gSynQuacerNonDiscoverableRuntimeI2cMasterGuid
+ gSynQuacerPlatformFormSetGuid
[Protocols]
gEdkiiNonDiscoverableDeviceProtocolGuid ## PRODUCES
@@ -59,5 +67,8 @@ [FixedPcd]
gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase
gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress
+[Pcd]
+ gSynQuacerTokenSpaceGuid.PcdPlatformSettings
+
[Depex]
TRUE
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni
new file mode 100644
index 000000000000..0425d8e0d761
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni
@@ -0,0 +1,28 @@
+/** @file
+*
+* Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#langdef en-US "English"
+
+#string STR_FORM_SET_TITLE #language en-US "SynQuacer Platform Settings"
+#string STR_FORM_SET_TITLE_HELP #language en-US "Press <Enter> to set platform specific options."
+
+#string STR_MAIN_FORM_TITLE #language en-US "SynQuacer Platform Settings"
+#string STR_NULL_STRING #language en-US ""
+
+#string STR_PCIE0_MAX_SPEED_PROMPT #language en-US "Maximum PCIe #0 link speed"
+#string STR_PCIE1_MAX_SPEED_PROMPT #language en-US "Maximum PCIe #1 link speed"
+#string STR_PCIE_MAX_SPEED_HELP #language en-US "The maximum speed the PCIe root port is allowed to negotiate"
+
+#string STR_PCIE_MAX_SPEED_UNLIMITED #language en-US "Unlimited"
+#string STR_PCIE_MAX_SPEED_GEN1 #language en-US "Gen1 (2.5 GT/s)"
diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr
new file mode 100644
index 000000000000..0dd25c980b38
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr
@@ -0,0 +1,61 @@
+/** @file
+*
+* Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Guid/HiiPlatformSetupFormset.h>
+#include <Guid/SynQuacerPlatformFormSet.h>
+#include <Platform/VarStore.h>
+
+//
+// EFI Variable attributes
+//
+#define EFI_VARIABLE_NON_VOLATILE 0x00000001
+#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002
+#define EFI_VARIABLE_RUNTIME_ACCESS 0x00000004
+#define EFI_VARIABLE_READ_ONLY 0x00000008
+
+formset
+ guid = SYNQUACER_PLATFORM_FORMSET_GUID,
+ title = STRING_TOKEN(STR_FORM_SET_TITLE),
+ help = STRING_TOKEN(STR_FORM_SET_TITLE_HELP),
+ classguid = EFI_HII_PLATFORM_SETUP_FORMSET_GUID,
+
+ efivarstore SYNQUACER_PLATFORM_VARSTORE_DATA,
+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE, // EFI variable attributes
+ name = SynQuacerPlatformSettings,
+ guid = SYNQUACER_PLATFORM_FORMSET_GUID;
+
+ form formid = 0x1000,
+ title = STRING_TOKEN(STR_MAIN_FORM_TITLE);
+
+ oneof varid = SynQuacerPlatformSettings.Pcie0MaxSpeed,
+ prompt = STRING_TOKEN(STR_PCIE0_MAX_SPEED_PROMPT),
+ help = STRING_TOKEN(STR_PCIE_MAX_SPEED_HELP),
+ flags = NUMERIC_SIZE_1 | INTERACTIVE | RESET_REQUIRED,
+ option text = STRING_TOKEN(STR_PCIE_MAX_SPEED_UNLIMITED), value = PCIE_MAX_SPEED_UNLIMITED, flags = DEFAULT;
+ option text = STRING_TOKEN(STR_PCIE_MAX_SPEED_GEN1), value = PCIE_MAX_SPEED_GEN1, flags = 0;
+ endoneof;
+
+ oneof varid = SynQuacerPlatformSettings.Pcie1MaxSpeed,
+ prompt = STRING_TOKEN(STR_PCIE1_MAX_SPEED_PROMPT),
+ help = STRING_TOKEN(STR_PCIE_MAX_SPEED_HELP),
+ flags = NUMERIC_SIZE_1 | INTERACTIVE | RESET_REQUIRED,
+ option text = STRING_TOKEN(STR_PCIE_MAX_SPEED_UNLIMITED), value = PCIE_MAX_SPEED_UNLIMITED, flags = DEFAULT;
+ option text = STRING_TOKEN(STR_PCIE_MAX_SPEED_GEN1), value = PCIE_MAX_SPEED_GEN1, flags = 0;
+ endoneof;
+
+ subtitle text = STRING_TOKEN(STR_NULL_STRING);
+
+ endform;
+
+endformset;
diff --git a/Silicon/Socionext/SynQuacer/Include/Guid/SynQuacerPlatformFormSet.h b/Silicon/Socionext/SynQuacer/Include/Guid/SynQuacerPlatformFormSet.h
new file mode 100644
index 000000000000..9a70bb873056
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/Include/Guid/SynQuacerPlatformFormSet.h
@@ -0,0 +1,23 @@
+/** @file
+*
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef __SYNQUACER_PLATFORM_FORMSET_H__
+#define __SYNQUACER_PLATFORM_FORMSET_H__
+
+#define SYNQUACER_PLATFORM_FORMSET_GUID \
+ { 0xe9cd576a, 0xaf9a, 0x4d41, { 0xbf, 0x1a, 0x29, 0xe1, 0xbc, 0x99, 0x99, 0x54 } }
+
+extern EFI_GUID gSynQuacerPlatformFormSetGuid;
+
+#endif
diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h b/Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h
new file mode 100644
index 000000000000..fb2db7479758
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h
@@ -0,0 +1,28 @@
+/** @file
+
+ Copyright (c) 2017, Linaro, Ltd. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available
+ under the terms and conditions of the BSD License which accompanies this
+ distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __VARSTORE_H__
+#define __VARSTORE_H__
+
+#define SYNQUACER_PLATFORM_VARIABLE_NAME L"SynQuacerPlatformSettings"
+
+#define PCIE_MAX_SPEED_UNLIMITED 0x0
+#define PCIE_MAX_SPEED_GEN1 0x1
+
+typedef struct {
+ UINT8 Pcie0MaxSpeed;
+ UINT8 Pcie1MaxSpeed;
+ UINT8 Reserved[6];
+} SYNQUACER_PLATFORM_VARSTORE_DATA;
+
+#endif
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf
index 27fcba034418..e475529eaf58 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf
@@ -45,6 +45,7 @@ [LibraryClasses]
DebugLib
DevicePathLib
MemoryAllocationLib
+ PcdLib
UefiBootServicesTableLib
[FixedPcd]
@@ -52,3 +53,4 @@ [FixedPcd]
[Pcd]
gSynQuacerTokenSpaceGuid.PcdPcieEnableMask
+ gSynQuacerTokenSpaceGuid.PcdPlatformSettings
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLibConstructor.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLibConstructor.c
index bea40e3dcfe8..1bdfd012b902 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLibConstructor.c
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLibConstructor.c
@@ -18,9 +18,11 @@
#include <Library/ArmLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
#include <Library/PciHostBridgeLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Platform/Pcie.h>
+#include <Platform/VarStore.h>
#include <Protocol/PciHostBridgeResourceAllocation.h>
#define IATU_VIEWPORT_OFF 0x900
@@ -268,7 +270,8 @@ PciInitControllerPost (
IN EFI_PHYSICAL_ADDRESS DbiBase,
IN EFI_PHYSICAL_ADDRESS ConfigBase,
IN EFI_PHYSICAL_ADDRESS IoMemBase,
- IN CONST PCI_ROOT_BRIDGE *RootBridge
+ IN CONST PCI_ROOT_BRIDGE *RootBridge,
+ IN BOOLEAN EnableGen2Speed
)
{
// 4: Set Bifurcation 1=disable 4=able
@@ -312,8 +315,10 @@ PciInitControllerPost (
EFI_PCI_COMMAND_MEMORY_SPACE |
EFI_PCI_COMMAND_BUS_MASTER);
- // Force link speed change to Gen2 at link up
- MmioOr32 (DbiBase + GEN2_CONTROL_OFF, DIRECT_SPEED_CHANGE);
+ if (EnableGen2Speed) {
+ // Force link speed change to Gen2 at link up
+ MmioOr32 (DbiBase + GEN2_CONTROL_OFF, DIRECT_SPEED_CHANGE);
+ }
// Region 0: MMIO32 range
ConfigureWindow (DbiBase, 0,
@@ -392,7 +397,16 @@ SynQuacerPciHostBridgeLibConstructor (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- UINTN Idx;
+ UINTN Idx;
+ UINT64 SettingsVal;
+ SYNQUACER_PLATFORM_VARSTORE_DATA *Settings;
+ BOOLEAN EnableGen2Speed[2];
+
+ SettingsVal = PcdGet64 (PcdPlatformSettings);
+ Settings = (SYNQUACER_PLATFORM_VARSTORE_DATA *)&SettingsVal;
+
+ EnableGen2Speed[0] = (Settings->Pcie0MaxSpeed != PCIE_MAX_SPEED_GEN1);
+ EnableGen2Speed[1] = (Settings->Pcie1MaxSpeed != PCIE_MAX_SPEED_GEN1);
for (Idx = 0; Idx < ARRAY_SIZE (mBaseAddresses); Idx++) {
if (PcdGet8 (PcdPcieEnableMask) & (1 << Idx)) {
@@ -414,7 +428,8 @@ SynQuacerPciHostBridgeLibConstructor (
mBaseAddresses[Idx].DbiBase,
mBaseAddresses[Idx].ConfigBase,
mBaseAddresses[Idx].IoMemBase,
- &mPciRootBridges[Idx]);
+ &mPciRootBridges[Idx],
+ EnableGen2Speed[Idx]);
}
}
diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec
index 76529e3c2164..eb4fc4ace2f7 100644
--- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
+++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
@@ -27,6 +27,8 @@ [Guids]
gSynQuacerPlatformDxeFileGuid = { 0xac422cc1, 0xd916, 0x489a, { 0xb1, 0x65, 0x53, 0x6f, 0xdf, 0xc6, 0x33, 0xc2 } }
+ gSynQuacerPlatformFormSetGuid = { 0xe9cd576a, 0xaf9a, 0x4d41, { 0xbf, 0x1a, 0x29, 0xe1, 0xbc, 0x99, 0x99, 0x54 } }
+
[Ppis]
gSynQuacerDramInfoPpiGuid = { 0x3e1d7356, 0xdda4, 0x4b1a, { 0x93, 0x46, 0xbf, 0x89, 0x1c, 0x86, 0x46, 0xcc } }
@@ -45,3 +47,6 @@ [PcdsFixedAtBuild]
[PcdsPatchableInModule, PcdsDynamic]
# Enable both RC #0 and RC #1 by default
gSynQuacerTokenSpaceGuid.PcdPcieEnableMask|0x3|UINT8|0x00000007
+
+[PcdsDynamic]
+ gSynQuacerTokenSpaceGuid.PcdPlatformSettings|0x0|UINT64|0x00000008
--
2.11.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH edk2-platforms 0/8] Socionext SynQuacer updates
2018-01-25 12:27 [PATCH edk2-platforms 0/8] Socionext SynQuacer updates Ard Biesheuvel
` (7 preceding siblings ...)
2018-01-25 12:27 ` [PATCH edk2-platforms 8/8] Silicon/Socionext/SynQuacer: implement menu option to set max PCIe speed Ard Biesheuvel
@ 2018-01-25 18:51 ` Ard Biesheuvel
8 siblings, 0 replies; 18+ messages in thread
From: Ard Biesheuvel @ 2018-01-25 18:51 UTC (permalink / raw)
To: edk2-devel@lists.01.org; +Cc: Leif Lindholm, Ard Biesheuvel
On 25 January 2018 at 12:27, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> Some stuff I have collected over the past 2 months or so. Note that this
> includes the SATA spread spectrum patch I sent out yesterday: I had forgotten
> all about this backlog, and I only remembered when attempting to apply it to
> the master branch.
>
> Ard Biesheuvel (8):
> Silicon/SynQuacer/PlatformDxe: enable spread spectrum mode for ASM1061
> SATA
> Silicon: fix typo in gPcf8563RealTimeClockLibI2cMasterProtocolGuid
> Silicon/NXP/Pcf8563RealTimeClockLib: avoid driver binding protocol
> Silicon/SynQuacerI2cDxe: remove spurious format specifier
> Silicon/SynQuacer: load I2C driver before platform DXE driver
> Silicon/SynQuacer/DeviceTree: align uart DT nodes
> Silicon/SynQuacer/DeviceTree: update NETSEC DT node to latest binding
> Silicon/Socionext/SynQuacer: implement menu option to set max PCIe
> speed
>
All pushed. Thanks.
^ permalink raw reply [flat|nested] 18+ messages in thread