From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::244; helo=mail-wr0-x244.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x244.google.com (mail-wr0-x244.google.com [IPv6:2a00:1450:400c:c0c::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 578E721E2568E for ; Thu, 25 Jan 2018 04:55:05 -0800 (PST) Received: by mail-wr0-x244.google.com with SMTP id a1so2878937wri.5 for ; Thu, 25 Jan 2018 05:00:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=zON9FGGItbcUOa/Hse+IkcyHFisbDji8z46iEEdhCuw=; b=V0B+l+0qL7rYFyoyWcmaaEr0deu0Y86tmo4GP4m4jVl9uObLwSAeWZyvr2810SxsNU OwuQUOAoZUzQziUSVikLYu01GDfK+mtz6lmWKxrfEIlvGRvMyWZh6qK3FQK/TuolfBfW cor8vNw9/6w6HBtj4zO6zZ0m+87vT4lpHE1RE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=zON9FGGItbcUOa/Hse+IkcyHFisbDji8z46iEEdhCuw=; b=n8OJVkCSyWUmL73lTsBS/Hrpyv3HUnv+hWLPLZ5ytw4JR/sEa4r27lwwPkDViGvKlX KxTcaxDSspRMDv9s0oAHktqtzKsxp+RUl9xxxNQGA1NVvphrDAE80RRNGXuuYaSgN7+F 2SHiM/TLOdulX+6X+EcSGWrRKIQDviiWZFodCy7I5tDMyNnz6GqAlM3FBZSwZbvg1mgS TvCOLiBZibxHG58qJGC3cYg0rJ6GUfHu2i53/lB8T3OxGLfK0yPJX1DmWuF6VAtn5Xzb 1jPVmxp6ho8AuTSvHdL6eqiSRrhkniCgKMpEO1/Fq0WEv0tV4lqTl0y+oVNy8Q2J14x0 HH+w== X-Gm-Message-State: AKwxytdpMSqF1JulODVKxeXIcr2I8jSH48nhsb8d8Ikwh1fAbtKgb+gE kqN4omS0Yj1bWXxjYqqCV+GqUw42Cj4= X-Google-Smtp-Source: AH8x227uISuXFNvy8o6jBNNR9wDUp3R1/l79g8DocxLhXLH6thLyMGL0NNphqRyZcO0G7R6oskMvbA== X-Received: by 10.223.135.209 with SMTP id c17mr1360366wrc.7.1516885233300; Thu, 25 Jan 2018 05:00:33 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id a2sm2608731wrc.53.2018.01.25.05.00.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 25 Jan 2018 05:00:32 -0800 (PST) Date: Thu, 25 Jan 2018 13:00:30 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org Message-ID: <20180125130030.lpfktprqzz3fpy7i@bivouac.eciton.net> References: <20180125122736.5427-1-ard.biesheuvel@linaro.org> <20180125122736.5427-8-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20180125122736.5427-8-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms 7/8] Silicon/SynQuacer/DeviceTree: update NETSEC DT node to latest binding X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Jan 2018 12:55:05 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Jan 25, 2018 at 12:27:35PM +0000, Ard Biesheuvel wrote: > The upstream version of the Linux NETSEC driver expects the PHY DT > node to appear under a MDIO subnode, so fix this in the device tree. > Fix the node name as well, this should be 'ethernet' not 'netsec', > and add a clock-names property describing the single clock reference > as 'phy_ref_clk'. > > Also, move the PHY subnode into the per-platform .dts file so we can > set the unit address in the node name. This is necessary because recent > versions of the DT compiler are more finicky about this. Presumably the only kernels this may break are using non-upstream code? If so: Reviewed-by: Leif Lindholm > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > --- > Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts | 7 +++++ > Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 30 +++++++++----------- > Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts | 7 +++++ > 3 files changed, 28 insertions(+), 16 deletions(-) > > diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts > index d2cd7ef90e6f..488c51a0f793 100644 > --- a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts > +++ b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts > @@ -44,3 +44,10 @@ > "GPIO-K", "GPIO-L", "PEC-PD26", "PEC-PD27", > "PEC-PD28", "PEC-PD29", "PEC-PD30", "PEC-PD31"; > }; > + > +&mdio_netsec { > + phy_netsec: ethernet-phy@7 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <7>; > + }; > +}; > diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi > index 7c3518facb98..6ee7a0b7ccb4 100644 > --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi > +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi > @@ -457,25 +457,23 @@ > #clock-cells = <0>; > }; > > - eth0: netsec@522D0000 { > - compatible = "socionext,synquacer-netsec"; > - reg = <0 0x522d0000 0x0 0x10000>, > - <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>; > - interrupts = ; > - clocks = <&clk_netsec>; > - phy-mode = "rgmii"; > - max-speed = <1000>; > - max-frame-size = <9000>; > - phy-handle = <ðphy0>; > - dma-coherent; > + ethernet@522d0000 { > + compatible = "socionext,synquacer-netsec"; > + reg = <0 0x522d0000 0x0 0x10000>, > + <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>; > + interrupts = ; > + clocks = <&clk_netsec>; > + clock-names = "phy_ref_clk"; > + phy-mode = "rgmii"; > + max-speed = <1000>; > + max-frame-size = <9000>; > + phy-handle = <&phy_netsec>; > + dma-coherent; > > + mdio_netsec: mdio { > #address-cells = <1>; > #size-cells = <0>; > - > - ethphy0: ethernet-phy { > - compatible = "ethernet-phy-ieee802.3-c22"; > - reg = ; > - }; > + }; > }; > > smmu: iommu@582c0000 { > diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts > index 132fd370a71b..97fddfedcb46 100644 > --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts > +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts > @@ -34,3 +34,10 @@ > &sdhci { > status = "okay"; > }; > + > +&mdio_netsec { > + phy_netsec: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + }; > +}; > -- > 2.11.0 >