From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::241; helo=mail-wm0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BA02022361E67 for ; Thu, 8 Feb 2018 06:52:16 -0800 (PST) Received: by mail-wm0-x241.google.com with SMTP id 143so9970158wma.5 for ; Thu, 08 Feb 2018 06:58:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=qQogN/AXyC5D3q92meofsiuhcJMQ2N/grQQQsK+wypM=; b=JL43jVlVFFWboY9YOtzRazOdladBtd5OAr7SgVd9+dSpLdCuVIt/EjfnaQo0WC2UcG uizxn0RC240vKDdzIA0txINJuIBFiMaJPMPPyhdQ36IxzEin2YXBci88MEPYNRjBpn3b 5ufriC6/MXO/6Ud0MVUdkmd4wROKbmtolC/vY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=qQogN/AXyC5D3q92meofsiuhcJMQ2N/grQQQsK+wypM=; b=n2FlfTKFaHT4C8vzio8LuUSApeafdG8H3doPOJ2ovhK17NatC7Gkza/ynHNz0t04Cw SBYdBmGeWr0WIf9kmUEamjSI61mCkVKTu6nhCz8nuFpCAxrTsXy/gTo2Ez1/4b1ZR3Ol yth7DGy8zrkHJD5CElolypaeUfQeYtAVzRGeSbir9KA5QU+2+b5TqKf9o3qdTQnCfQu2 IL5VKho0YC2suVJMDtpftOAhjHwR2kjN9EiZXWki4tUgCBkUXZb4WUeoaO4PXgx6nMe2 jX/5ejj6LAkFl/T8Sqxc2bUVS4pYFi2cvEmRf9xlvHgGr2zcptV4wjvqr/cqHcyhEcTl s/XQ== X-Gm-Message-State: APf1xPDn6b4EoNiDTBFXJXMwq13hWsb4MP86iDhceRYaHWqq9whSZtqx SaLBvwn4wS6jB/NGnAhjwRHSivMeEeo= X-Google-Smtp-Source: AH8x225030Cn6nM+d03gYC5kPz7V1OI3tvjiuCceV4UZPt89+jkxZVDxhmHlM3aRArG39sz1l/rxYw== X-Received: by 10.28.112.21 with SMTP id l21mr1412260wmc.70.1518101879183; Thu, 08 Feb 2018 06:57:59 -0800 (PST) Received: from localhost.localdomain ([196.85.252.149]) by smtp.gmail.com with ESMTPSA id s2sm472772wmf.0.2018.02.08.06.57.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Feb 2018 06:57:58 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, Ard Biesheuvel Date: Thu, 8 Feb 2018 14:57:51 +0000 Message-Id: <20180208145751.10252-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 Subject: [PATCH edk2-platforms] Silicon/SynQuacer/DeviceTree: remove SCPI/MHU nodes X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Feb 2018 14:52:17 -0000 On our SynQuacer based platform, power state handling and other low-level duties are handled by the secure firmware, not by the OS, so remove the various MHU/SCPI related nodes from the device tree. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 30 -------------------- 1 file changed, 30 deletions(-) diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 3db3c5ed1c50..a113780c2ab8 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -388,36 +388,6 @@ method = "smc"; }; - mailbox: mhu@45000000 { - compatible = "arm,mhu", "arm,primecell"; - reg = <0x0 0x45000000 0x0 0x1000>; - interrupts = , - ; /* Non-Sec */ - interrupt-names = "mhu_lpri_rx", "mhu_hpri_rx"; - #mbox-cells = <1>; - clocks = <&clk_apb>; - clock-names = "apb_pclk"; - }; - - sram: sram@45200000 { - compatible = "mmio-sram"; - reg = <0x0 0x45200000 0x0 0x200>; - - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x0 0x45200000 0x200>; - - cpu_scp_hpri: scp-shmem@0 { - reg = <0x0 0x200>; - }; - }; - - scpi { - compatible = "arm,scpi"; - mboxes = <&mailbox 1>; - shmem = <&cpu_scp_hpri>; - }; - clk_uart: refclk62500khz { compatible = "fixed-clock"; #clock-cells = <0>; -- 2.11.0