From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::242; helo=mail-wr0-x242.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x242.google.com (mail-wr0-x242.google.com [IPv6:2a00:1450:400c:c0c::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 60B0822361E4C for ; Thu, 8 Feb 2018 08:12:04 -0800 (PST) Received: by mail-wr0-x242.google.com with SMTP id a43so5292808wrc.4 for ; Thu, 08 Feb 2018 08:17:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=P+MiXg5zTLimXyYr5yX9UQKZI7wswO+40mFR7gfBW8w=; b=B+PojOIdv+BUkoX302ILSThuscxWUOKXSE/X6idiTGcPrj4r9sb1G3vgXtfcDZCXKt zP4Fq5GDjNa0gslj8E2Q6HM88bk755gTgtgwzRvoSoCx6uLe8PY/6hQZpSceCUyUBcLX 1y6RPLnXCAd6AqlkVTpHeX2pT9jA6PZ41woXk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=P+MiXg5zTLimXyYr5yX9UQKZI7wswO+40mFR7gfBW8w=; b=t9GgF9OsX/Ds4Qd6jGAnfmk9kFVvxYZBpDjHpbnV+M5UJbjxAqKHOvT3eDm+BuqLBH ddq7CSf5I5pfDAtiG5Q7miD8dlcYlmTDDz9i0L0Qd5JDcvnyuqhq/E9KKFVSAQ+oiWNC gMSrCeGXBjASIJSfTukpk4xSFvsLp2ZLCwHYkd6zn5TkJFIG4exv3pqWjDyvSm7EXM5v vhCB2AZEJh0a8zt645/5xv0f2YUAh3ST97LaWE4iB7jQZO8OFLegnEnrY3FfAwvl8gTh bGYDdIGvaWvNcKjYCGX87sHUGRcdu8C0LBu15W3mzv+ivHWMb062Un+83LpxNJqjmBw8 iDxQ== X-Gm-Message-State: APf1xPDKpjdys6LX2xa6duTQVcrNnIAvu3FKjndt4cdfmJmbtvgFib0G dEhdP2+NWiKcWLVqUPvMIk9WOQ== X-Google-Smtp-Source: AH8x224s2oGuNZlpissWfvWcxWGHjglD2vRMfrR6Kjwp3YFf/+zLKcjl+qHxvR9z1ZnpEC0M7HJg4Q== X-Received: by 10.223.128.169 with SMTP id 38mr1280483wrl.104.1518106667194; Thu, 08 Feb 2018 08:17:47 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id u98sm366561wrc.69.2018.02.08.08.17.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 08 Feb 2018 08:17:46 -0800 (PST) Date: Thu, 8 Feb 2018 16:17:44 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org Message-ID: <20180208161744.ngr7n2dbspi3yggz@bivouac.eciton.net> References: <20180208145751.10252-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20180208145751.10252-1-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms] Silicon/SynQuacer/DeviceTree: remove SCPI/MHU nodes X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Feb 2018 16:12:05 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Feb 08, 2018 at 02:57:51PM +0000, Ard Biesheuvel wrote: > On our SynQuacer based platform, power state handling and other > low-level duties are handled by the secure firmware, not by the > OS, so remove the various MHU/SCPI related nodes from the device > tree. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel Ah, yes please. Reviewed-by: Leif Lindholm > --- > Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 30 -------------------- > 1 file changed, 30 deletions(-) > > diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi > index 3db3c5ed1c50..a113780c2ab8 100644 > --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi > +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi > @@ -388,36 +388,6 @@ > method = "smc"; > }; > > - mailbox: mhu@45000000 { > - compatible = "arm,mhu", "arm,primecell"; > - reg = <0x0 0x45000000 0x0 0x1000>; > - interrupts = , > - ; /* Non-Sec */ > - interrupt-names = "mhu_lpri_rx", "mhu_hpri_rx"; > - #mbox-cells = <1>; > - clocks = <&clk_apb>; > - clock-names = "apb_pclk"; > - }; > - > - sram: sram@45200000 { > - compatible = "mmio-sram"; > - reg = <0x0 0x45200000 0x0 0x200>; > - > - #address-cells = <1>; > - #size-cells = <1>; > - ranges = <0 0x0 0x45200000 0x200>; > - > - cpu_scp_hpri: scp-shmem@0 { > - reg = <0x0 0x200>; > - }; > - }; > - > - scpi { > - compatible = "arm,scpi"; > - mboxes = <&mailbox 1>; > - shmem = <&cpu_scp_hpri>; > - }; > - > clk_uart: refclk62500khz { > compatible = "fixed-clock"; > #clock-cells = <0>; > -- > 2.11.0 >