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[82.12.0.119]) by smtp.gmail.com with ESMTPSA id s9sm805758wra.4.2018.02.08.11.30.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Feb 2018 11:30:22 -0800 (PST) From: Leif Lindholm To: edk2-devel@lists.01.org Cc: ard.biesheuvel@linaro.org Date: Thu, 8 Feb 2018 19:30:19 +0000 Message-Id: <20180208193021.24524-1-leif.lindholm@linaro.org> X-Mailer: git-send-email 2.11.0 Subject: [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Feb 2018 19:24:40 -0000 PcdCacheEnabled was never useful for these platforms, but they copied it over from other platforms used as templates. Delete it here to keep the platforms building once the Pcd is removed from EmbeddedPkg. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm --- Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 3 --- Platform/LeMaker/CelloBoard/CelloBoard.dsc | 3 --- Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 3 --- Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf | 3 --- Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf | 3 --- Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c | 6 +----- 6 files changed, 1 insertion(+), 20 deletions(-) diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc index 21edcc8798..48018abc69 100644 --- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc @@ -282,9 +282,6 @@ [BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,Buil ################################################################################ [PcdsFeatureFlag.common] - # All pages are cached by default - gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE - # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE diff --git a/Platform/LeMaker/CelloBoard/CelloBoard.dsc b/Platform/LeMaker/CelloBoard/CelloBoard.dsc index cf3df86514..2468583c0d 100644 --- a/Platform/LeMaker/CelloBoard/CelloBoard.dsc +++ b/Platform/LeMaker/CelloBoard/CelloBoard.dsc @@ -270,9 +270,6 @@ [BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,Buil ################################################################################ [PcdsFeatureFlag.common] - # All pages are cached by default - gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE - # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc index 0abec8120a..f0a7e97941 100644 --- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc @@ -272,9 +272,6 @@ [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] ################################################################################ [PcdsFeatureFlag.common] - # All pages are cached by default - gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE - # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf index 6b7481ec6d..3a38f294eb 100644 --- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf @@ -53,9 +53,6 @@ [Guids] [Ppis] gArmMpCoreInfoPpiGuid -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - [Pcd] gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf index b313d4baad..b24ffd469a 100644 --- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf @@ -49,9 +49,6 @@ [Sources.AARCH64] [Guids] gAmdStyxMpCoreInfoGuid ## CONSUMER -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - [Ppis] gArmMpCoreInfoPpiGuid diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c index 3b82132d08..479a40627d 100644 --- a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c @@ -78,11 +78,7 @@ ArmPlatformGetVirtualMemoryMap ( return; } - if (FeaturePcdGet(PcdCacheEnable) == TRUE) { - CacheAttributes = DDR_ATTRIBUTES_CACHED; - } else { - CacheAttributes = DDR_ATTRIBUTES_UNCACHED; - } + CacheAttributes = DDR_ATTRIBUTES_CACHED; DEBUG ((EFI_D_ERROR, " Memory Map\n------------------------------------------------------------------------\n")); DEBUG ((EFI_D_ERROR, "Description : START - END [ SIZE ] { ATTR }\n")); -- 2.11.0