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* [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled
@ 2018-02-08 19:30 Leif Lindholm
  2018-02-08 19:30 ` [PATCH edk2-platforms 2/3] Platform/ARM: drop use of PcdCacheEnabled Leif Lindholm
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Leif Lindholm @ 2018-02-08 19:30 UTC (permalink / raw)
  To: edk2-devel; +Cc: ard.biesheuvel

PcdCacheEnabled	was never useful for these platforms, but they copied it
over from other platforms used as templates.
Delete it here to keep the platforms building once the Pcd is removed
from EmbeddedPkg.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Platform/AMD/OverdriveBoard/OverdriveBoard.dsc              | 3 ---
 Platform/LeMaker/CelloBoard/CelloBoard.dsc                  | 3 ---
 Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 3 ---
 Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf          | 3 ---
 Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf       | 3 ---
 Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c               | 6 +-----
 6 files changed, 1 insertion(+), 20 deletions(-)

diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
index 21edcc8798..48018abc69 100644
--- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
@@ -282,9 +282,6 @@ [BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,Buil
 ################################################################################
 
 [PcdsFeatureFlag.common]
-  # All pages are cached by default
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
-
   # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
   gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
 
diff --git a/Platform/LeMaker/CelloBoard/CelloBoard.dsc b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
index cf3df86514..2468583c0d 100644
--- a/Platform/LeMaker/CelloBoard/CelloBoard.dsc
+++ b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
@@ -270,9 +270,6 @@ [BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,Buil
 ################################################################################
 
 [PcdsFeatureFlag.common]
-  # All pages are cached by default
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
-
   # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
   gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
 
diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
index 0abec8120a..f0a7e97941 100644
--- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
+++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
@@ -272,9 +272,6 @@ [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
 ################################################################################
 
 [PcdsFeatureFlag.common]
-  # All pages are cached by default
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
-
   # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
   gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
 
diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
index 6b7481ec6d..3a38f294eb 100644
--- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
+++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
@@ -53,9 +53,6 @@ [Guids]
 [Ppis]
   gArmMpCoreInfoPpiGuid
 
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
 [Pcd]
   gArmTokenSpaceGuid.PcdSystemMemoryBase
   gArmTokenSpaceGuid.PcdSystemMemorySize
diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
index b313d4baad..b24ffd469a 100644
--- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
+++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
@@ -49,9 +49,6 @@ [Sources.AARCH64]
 [Guids]
   gAmdStyxMpCoreInfoGuid               ## CONSUMER
 
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
 [Ppis]
   gArmMpCoreInfoPpiGuid
 
diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
index 3b82132d08..479a40627d 100644
--- a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
+++ b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
@@ -78,11 +78,7 @@ ArmPlatformGetVirtualMemoryMap (
       return;
   }
 
-  if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
-      CacheAttributes = DDR_ATTRIBUTES_CACHED;
-  } else {
-      CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
-  }
+  CacheAttributes = DDR_ATTRIBUTES_CACHED;
 
   DEBUG ((EFI_D_ERROR, " Memory Map\n------------------------------------------------------------------------\n"));
   DEBUG ((EFI_D_ERROR, "Description                    :        START       -        END         [        SIZE        ]    {              ATTR             }\n"));
-- 
2.11.0



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH edk2-platforms 2/3] Platform/ARM: drop use of PcdCacheEnabled
  2018-02-08 19:30 [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled Leif Lindholm
@ 2018-02-08 19:30 ` Leif Lindholm
  2018-02-08 19:30 ` [PATCH edk2-platforms 3/3] (Platform/Silicon)/Hisilicon: " Leif Lindholm
  2018-02-08 19:46 ` [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled Ard Biesheuvel
  2 siblings, 0 replies; 5+ messages in thread
From: Leif Lindholm @ 2018-02-08 19:30 UTC (permalink / raw)
  To: edk2-devel; +Cc: ard.biesheuvel

PcdCacheEnabled does nothing useful for these platforms.

Delete all uses of it here to keep the platforms building once the Pcd is
removed from EmbeddedPkg.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf              | 3 ---
 Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c                | 6 +-----
 .../VExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf   | 3 ---
 .../ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c    | 6 +-----
 .../ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf   | 3 ---
 .../VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf    | 3 ---
 Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c       | 4 +---
 7 files changed, 3 insertions(+), 25 deletions(-)

diff --git a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf
index 2dd384daba..d3fc9b6cc7 100644
--- a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf
+++ b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf
@@ -43,9 +43,6 @@ [Sources.AARCH64]
 [Sources.ARM]
   Arm/ArmJunoHelper.S     | GCC
 
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
 [FixedPcd]
   gArmTokenSpaceGuid.PcdSystemMemoryBase
   gArmTokenSpaceGuid.PcdSystemMemorySize
diff --git a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c
index aa8d7d9c3b..2d9c2c95a8 100644
--- a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c
+++ b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c
@@ -72,11 +72,7 @@ ArmPlatformGetVirtualMemoryMap (
       return;
   }
 
-  if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
-      CacheAttributes = DDR_ATTRIBUTES_CACHED;
-  } else {
-      CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
-  }
+  CacheAttributes = DDR_ATTRIBUTES_CACHED;
 
   // SMB CS0 - NOR0 Flash
   VirtualMemoryTable[Index].PhysicalBase    = ARM_VE_SMB_NOR0_BASE;
diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf
index 9e81b1c1cc..329f80dcfe 100644
--- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf
+++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf
@@ -40,9 +40,6 @@ [Sources.common]
   CTA15-A7Helper.asm | RVCT
   CTA15-A7Helper.S   | GCC
 
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
 [FixedPcd]
   gArmPlatformTokenSpaceGuid.PcdCoreCount
 
diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c
index 4403cbacb8..05e9abc572 100644
--- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c
+++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c
@@ -53,11 +53,7 @@ ArmPlatformGetVirtualMemoryMap (
     return;
   }
 
-  if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
-    CacheAttributes = DDR_ATTRIBUTES_CACHED;
-  } else {
-    CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
-  }
+  CacheAttributes = DDR_ATTRIBUTES_CACHED;
 
 #ifdef ARM_BIGLITTLE_TC2
   // Secure NOR0 Flash
diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
index 4cbd2ff4b4..8c6291c42f 100644
--- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
+++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
@@ -45,9 +45,6 @@ [Sources.ARM]
 [Sources.AARCH64]
   AArch64/RTSMHelper.S
 
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
 [FixedPcd]
   gArmTokenSpaceGuid.PcdSystemMemoryBase
   gArmTokenSpaceGuid.PcdSystemMemorySize
diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf
index 269760f8ba..2287756cf8 100644
--- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf
+++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf
@@ -41,9 +41,6 @@ [Sources.ARM]
 [Sources.AARCH64]
   AArch64/RTSMHelper.S
 
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
 [FixedPcd]
   gArmTokenSpaceGuid.PcdSystemMemoryBase
   gArmTokenSpaceGuid.PcdSystemMemorySize
diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
index 6379e81751..9fb0803d31 100644
--- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
+++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
@@ -90,9 +90,7 @@ ArmPlatformGetVirtualMemoryMap (
     return;
   }
 
-  CacheAttributes = (FeaturePcdGet(PcdCacheEnable))
-                    ? DDR_ATTRIBUTES_CACHED
-                    : DDR_ATTRIBUTES_UNCACHED;
+  CacheAttributes = DDR_ATTRIBUTES_CACHED;
 
   // ReMap (Either NOR Flash or DRAM)
   VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;
-- 
2.11.0



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH edk2-platforms 3/3] (Platform/Silicon)/Hisilicon: drop use of PcdCacheEnabled
  2018-02-08 19:30 [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled Leif Lindholm
  2018-02-08 19:30 ` [PATCH edk2-platforms 2/3] Platform/ARM: drop use of PcdCacheEnabled Leif Lindholm
@ 2018-02-08 19:30 ` Leif Lindholm
  2018-02-08 19:46 ` [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled Ard Biesheuvel
  2 siblings, 0 replies; 5+ messages in thread
From: Leif Lindholm @ 2018-02-08 19:30 UTC (permalink / raw)
  To: edk2-devel; +Cc: ard.biesheuvel

PcdCacheEnabled was never useful for these platforms, but it was
copied over from other platforms used as templates.

Delete it here to keep the platforms building once the Pcd is removed
from EmbeddedPkg.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Platform/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf              | 3 ---
 Platform/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c                | 6 +-----
 .../Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf    | 3 ---
 .../Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibMem.c   | 6 +-----
 .../Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf | 3 ---
 5 files changed, 2 insertions(+), 19 deletions(-)

diff --git a/Platform/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf b/Platform/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf
index 79723d3b17..6a47a4501e 100644
--- a/Platform/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf
+++ b/Platform/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf
@@ -41,9 +41,6 @@ [Sources.common]
 [Sources.AARCH64]
   HiKeyHelper.S
 
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
 [FixedPcd]
   gArmTokenSpaceGuid.PcdArmPrimaryCore
   gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
diff --git a/Platform/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c b/Platform/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c
index c388a7a5ab..0f6ad89a02 100644
--- a/Platform/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c
+++ b/Platform/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c
@@ -164,11 +164,7 @@ ArmPlatformGetVirtualMemoryMap (
     return;
   }
 
-  if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
-    CacheAttributes = DDR_ATTRIBUTES_CACHED;
-  } else {
-    CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
-  }
+  CacheAttributes = DDR_ATTRIBUTES_CACHED;
 
   Index = 0;
 
diff --git a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
index 0a3a6c1bb7..706497584e 100644
--- a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
+++ b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
@@ -45,9 +45,6 @@ [Sources.common]
 [Sources.AARCH64]
   AArch64/Helper.S
 
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
 [FixedPcd]
   gArmTokenSpaceGuid.PcdSystemMemoryBase
   gArmTokenSpaceGuid.PcdSystemMemorySize
diff --git a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibMem.c b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibMem.c
index b7bc75dc74..c5a745a44b 100644
--- a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibMem.c
+++ b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibMem.c
@@ -58,11 +58,7 @@ ArmPlatformGetVirtualMemoryMap (
       return;
   }
 
-  if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
-      CacheAttributes = DDR_ATTRIBUTES_CACHED;
-  } else {
-      CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
-  }
+  CacheAttributes = DDR_ATTRIBUTES_CACHED;
 
   Index = OemSetVirtualMapDesc(VirtualMemoryTable, CacheAttributes);
 
diff --git a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf
index 23eca287fe..b31ea41f51 100644
--- a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf
+++ b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf
@@ -41,9 +41,6 @@ [Sources.common]
 [Sources.AARCH64]
   AArch64/Helper.S
 
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
 [FixedPcd]
   gArmTokenSpaceGuid.PcdSystemMemoryBase
   gArmTokenSpaceGuid.PcdSystemMemorySize
-- 
2.11.0



^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled
  2018-02-08 19:30 [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled Leif Lindholm
  2018-02-08 19:30 ` [PATCH edk2-platforms 2/3] Platform/ARM: drop use of PcdCacheEnabled Leif Lindholm
  2018-02-08 19:30 ` [PATCH edk2-platforms 3/3] (Platform/Silicon)/Hisilicon: " Leif Lindholm
@ 2018-02-08 19:46 ` Ard Biesheuvel
  2018-02-09  9:41   ` Leif Lindholm
  2 siblings, 1 reply; 5+ messages in thread
From: Ard Biesheuvel @ 2018-02-08 19:46 UTC (permalink / raw)
  To: Leif Lindholm; +Cc: edk2-devel@lists.01.org

On 8 February 2018 at 19:30, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> PcdCacheEnabled was never useful for these platforms, but they copied it
> over from other platforms used as templates.
> Delete it here to keep the platforms building once the Pcd is removed
> from EmbeddedPkg.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>

For the series:
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

> ---
>  Platform/AMD/OverdriveBoard/OverdriveBoard.dsc              | 3 ---
>  Platform/LeMaker/CelloBoard/CelloBoard.dsc                  | 3 ---
>  Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 3 ---
>  Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf          | 3 ---
>  Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf       | 3 ---
>  Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c               | 6 +-----
>  6 files changed, 1 insertion(+), 20 deletions(-)
>
> diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> index 21edcc8798..48018abc69 100644
> --- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> @@ -282,9 +282,6 @@ [BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,Buil
>  ################################################################################
>
>  [PcdsFeatureFlag.common]
> -  # All pages are cached by default
> -  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
> -
>    # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
>    gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
>
> diff --git a/Platform/LeMaker/CelloBoard/CelloBoard.dsc b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
> index cf3df86514..2468583c0d 100644
> --- a/Platform/LeMaker/CelloBoard/CelloBoard.dsc
> +++ b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
> @@ -270,9 +270,6 @@ [BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,Buil
>  ################################################################################
>
>  [PcdsFeatureFlag.common]
> -  # All pages are cached by default
> -  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
> -
>    # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
>    gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
>
> diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
> index 0abec8120a..f0a7e97941 100644
> --- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
> +++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
> @@ -272,9 +272,6 @@ [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
>  ################################################################################
>
>  [PcdsFeatureFlag.common]
> -  # All pages are cached by default
> -  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
> -
>    # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
>    gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
>
> diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
> index 6b7481ec6d..3a38f294eb 100644
> --- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
> +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
> @@ -53,9 +53,6 @@ [Guids]
>  [Ppis]
>    gArmMpCoreInfoPpiGuid
>
> -[FeaturePcd]
> -  gEmbeddedTokenSpaceGuid.PcdCacheEnable
> -
>  [Pcd]
>    gArmTokenSpaceGuid.PcdSystemMemoryBase
>    gArmTokenSpaceGuid.PcdSystemMemorySize
> diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
> index b313d4baad..b24ffd469a 100644
> --- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
> +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
> @@ -49,9 +49,6 @@ [Sources.AARCH64]
>  [Guids]
>    gAmdStyxMpCoreInfoGuid               ## CONSUMER
>
> -[FeaturePcd]
> -  gEmbeddedTokenSpaceGuid.PcdCacheEnable
> -
>  [Ppis]
>    gArmMpCoreInfoPpiGuid
>
> diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
> index 3b82132d08..479a40627d 100644
> --- a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
> +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
> @@ -78,11 +78,7 @@ ArmPlatformGetVirtualMemoryMap (
>        return;
>    }
>
> -  if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
> -      CacheAttributes = DDR_ATTRIBUTES_CACHED;
> -  } else {
> -      CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
> -  }
> +  CacheAttributes = DDR_ATTRIBUTES_CACHED;
>
>    DEBUG ((EFI_D_ERROR, " Memory Map\n------------------------------------------------------------------------\n"));
>    DEBUG ((EFI_D_ERROR, "Description                    :        START       -        END         [        SIZE        ]    {              ATTR             }\n"));
> --
> 2.11.0
>


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled
  2018-02-08 19:46 ` [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled Ard Biesheuvel
@ 2018-02-09  9:41   ` Leif Lindholm
  0 siblings, 0 replies; 5+ messages in thread
From: Leif Lindholm @ 2018-02-09  9:41 UTC (permalink / raw)
  To: Ard Biesheuvel; +Cc: edk2-devel@lists.01.org

On Thu, Feb 08, 2018 at 07:46:49PM +0000, Ard Biesheuvel wrote:
> On 8 February 2018 at 19:30, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> > PcdCacheEnabled was never useful for these platforms, but they copied it
> > over from other platforms used as templates.
> > Delete it here to keep the platforms building once the Pcd is removed
> > from EmbeddedPkg.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
> 
> For the series:
> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Thanks!
Pushed as 69f992e854..ebe08785ae.

> > ---
> >  Platform/AMD/OverdriveBoard/OverdriveBoard.dsc              | 3 ---
> >  Platform/LeMaker/CelloBoard/CelloBoard.dsc                  | 3 ---
> >  Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 3 ---
> >  Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf          | 3 ---
> >  Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf       | 3 ---
> >  Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c               | 6 +-----
> >  6 files changed, 1 insertion(+), 20 deletions(-)
> >
> > diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> > index 21edcc8798..48018abc69 100644
> > --- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> > +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> > @@ -282,9 +282,6 @@ [BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,Buil
> >  ################################################################################
> >
> >  [PcdsFeatureFlag.common]
> > -  # All pages are cached by default
> > -  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
> > -
> >    # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
> >    gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
> >
> > diff --git a/Platform/LeMaker/CelloBoard/CelloBoard.dsc b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
> > index cf3df86514..2468583c0d 100644
> > --- a/Platform/LeMaker/CelloBoard/CelloBoard.dsc
> > +++ b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
> > @@ -270,9 +270,6 @@ [BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,Buil
> >  ################################################################################
> >
> >  [PcdsFeatureFlag.common]
> > -  # All pages are cached by default
> > -  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
> > -
> >    # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
> >    gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
> >
> > diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
> > index 0abec8120a..f0a7e97941 100644
> > --- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
> > +++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
> > @@ -272,9 +272,6 @@ [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
> >  ################################################################################
> >
> >  [PcdsFeatureFlag.common]
> > -  # All pages are cached by default
> > -  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
> > -
> >    # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
> >    gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
> >
> > diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
> > index 6b7481ec6d..3a38f294eb 100644
> > --- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
> > +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
> > @@ -53,9 +53,6 @@ [Guids]
> >  [Ppis]
> >    gArmMpCoreInfoPpiGuid
> >
> > -[FeaturePcd]
> > -  gEmbeddedTokenSpaceGuid.PcdCacheEnable
> > -
> >  [Pcd]
> >    gArmTokenSpaceGuid.PcdSystemMemoryBase
> >    gArmTokenSpaceGuid.PcdSystemMemorySize
> > diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
> > index b313d4baad..b24ffd469a 100644
> > --- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
> > +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
> > @@ -49,9 +49,6 @@ [Sources.AARCH64]
> >  [Guids]
> >    gAmdStyxMpCoreInfoGuid               ## CONSUMER
> >
> > -[FeaturePcd]
> > -  gEmbeddedTokenSpaceGuid.PcdCacheEnable
> > -
> >  [Ppis]
> >    gArmMpCoreInfoPpiGuid
> >
> > diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
> > index 3b82132d08..479a40627d 100644
> > --- a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
> > +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
> > @@ -78,11 +78,7 @@ ArmPlatformGetVirtualMemoryMap (
> >        return;
> >    }
> >
> > -  if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
> > -      CacheAttributes = DDR_ATTRIBUTES_CACHED;
> > -  } else {
> > -      CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
> > -  }
> > +  CacheAttributes = DDR_ATTRIBUTES_CACHED;
> >
> >    DEBUG ((EFI_D_ERROR, " Memory Map\n------------------------------------------------------------------------\n"));
> >    DEBUG ((EFI_D_ERROR, "Description                    :        START       -        END         [        SIZE        ]    {              ATTR             }\n"));
> > --
> > 2.11.0
> >


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2018-02-09  9:35 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-02-08 19:30 [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled Leif Lindholm
2018-02-08 19:30 ` [PATCH edk2-platforms 2/3] Platform/ARM: drop use of PcdCacheEnabled Leif Lindholm
2018-02-08 19:30 ` [PATCH edk2-platforms 3/3] (Platform/Silicon)/Hisilicon: " Leif Lindholm
2018-02-08 19:46 ` [PATCH edk2-platforms 1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled Ard Biesheuvel
2018-02-09  9:41   ` Leif Lindholm

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