From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:400c:c09::22c; helo=mail-wm0-x22c.google.com; envelope-from=pete@akeo.ie; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x22c.google.com (mail-wm0-x22c.google.com [IPv6:2a00:1450:400c:c09::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DB8D622161147 for ; Wed, 14 Feb 2018 05:03:18 -0800 (PST) Received: by mail-wm0-x22c.google.com with SMTP id j21so17734260wmh.1 for ; Wed, 14 Feb 2018 05:09:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=akeo-ie.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=xxZf58BNBh0fC30c0INu4CsEWA3fxk2S0TdETLpajBQ=; b=kkcUE/dy+uS7rM3XKoGIqex/WgAR3CrOKvwRmbmo2IYVVRiv2wsZlldDIMlykHtCY5 xzw6kp32vAWbomO0D0yA8d4RzOhlo7/thfwMRq8GUAD3RBkElOc6JHirRGCczL8ELDGd v5d98Q1S1PlxUtSogjEUeyZ26MBYY17hnGQv/PbtfMuqTLKMsW2DaBJU3jIqSgDbXDYT B5jM5GFXbcma+ktd1vqeE2to0KhnQp61BpJL5S6KvjXZlVZKrnI8Ers115MUHFyLWb0+ GxQ7DYkJK3Pegz6iwWih/7JH6DHXnd2X4koebj8T3pNDTg1EMKEnFXI4dQP5O01F7kme Wc+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=xxZf58BNBh0fC30c0INu4CsEWA3fxk2S0TdETLpajBQ=; b=nwkE8MEKPkTR8uZ5ZU/PNDVA9D5sv2q/7HoY0xtauSEFINVp330zsdzXsp7FQHQPGI khDrEd288aOztM9M4VF16mzt5O5VnKTIlHxudGV3Vsg6y46JNzE85P08xoGHjakWip/M R2QEouMCDdVuA6xsE1EwBQMIgApp/zQLPQiPXl7k+eHjq8XllGrMjATdYiH4NnEeo391 u/2B2bVDz5lTM24/Yh8WGtvn8GTEjcWUuRBABYf664a3fFIvCTXxpe+qpB3r5t/k2VBD NypAlDfYVravop3YDZJ/I3chEg+1xgWgW8tgo8d4VTZHvDIIo9llV1g12nN6NK4fp+6D jWbQ== X-Gm-Message-State: APf1xPDjBUZGikjzybPTAxrHl0wtuGCAN7QVmR4dO7hip0AFU/axSqvU AJPX3z16BRSpZ/iJ2TKWwR3rDLS128s= X-Google-Smtp-Source: AH8x224Qs6Je+mmDqI3M6UhVGimOf1dtpMpp8Y815AEi33xbm3dDUg3D6QJOdFhBKMFtzeUWjYjtlQ== X-Received: by 10.80.139.2 with SMTP id l2mr7020134edl.14.1518613748018; Wed, 14 Feb 2018 05:09:08 -0800 (PST) Received: from localhost.localdomain ([84.203.84.137]) by smtp.gmail.com with ESMTPSA id b13sm1262955edk.59.2018.02.14.05.09.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Feb 2018 05:09:06 -0800 (PST) From: Pete Batard To: edk2-devel@lists.01.org Cc: liming.gao@intel.com, ard.biesheuvel@linaro.org Date: Wed, 14 Feb 2018 13:08:53 +0000 Message-Id: <20180214130857.5020-1-pete@akeo.ie> X-Mailer: git-send-email 2.9.3.windows.2 Subject: [PATCH 0/4] Add ARM64 support for VS2017 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 14 Feb 2018 13:03:19 -0000 This series completes VS2017 support by enabling AARCH64 compilation. * PATCH 1 targets the disabling of VS Level 4 warnings. The disabled warnings for ARM64 are the same as the ones for IA32, X64 and ARM. * PATCH 2 adds assembly source in MdePkg/Library/BaseLib for various low level required functions. These new assembly files were converted from their GCC version, with minor changes applied to make them palatable to the MSFT assembler. * PATCH 3 adds variable argument handlers for print output. This is achieved without relying on any external toolchain headers. However a call to the __va_start() compiler intrinsic function is now being used for the VA_START macros, which we apply for ARM as well. * PATCH 4 enables the selection of ARM64 in the conf templates. One item of note is that the build options for ARM64 are the same as for ARM, except for /BASE:0 which was removed to avoid error: 'invalid base address 0x0; ARM64 image cannot have base address below 4GB' With these patches, VS2017 toolchain users should be able to compile regular UEFI ARM64 applications using EDK2. Note however that ARM64 support requires the use of Visual Studio 2017 Update 4 or later (a.k.a. v15.4), as native ARM64 compilation was not included in any version of Visual Studio prior to that. Additional notes: We tested compiling and running the full UEFI Shell with this series, as well as a small set of applications and drivers, and saw no issues. Since we also modified the VA_START() macro for ARM, we also re-ran similar tests for ARM, to confirm that there was no regression there. Finally, we did not test the generation of a complete QEMU ARM64 firmware as it requires porting a handful of assembly sources, that don't exist yet, and our focus is with the generation of working AARCH64 drivers or applications. Hopefully, this can be tackled as VS2017/ARM64 sees more usage... Regards, /Pete Pete Batard (4): MdePkg: Disable some Level 4 warnings for VS2017/ARM64 MdePkg/Library/BaseLib: Enable VS2017/ARM64 builds MdePkg/Include: Add VA list support for VS2017/ARM64 BaseTools/Conf: Add VS2017/ARM64 support BaseTools/Conf/build_rule.template | 2 +- BaseTools/Conf/tools_def.template | 32 ++++++- MdePkg/Include/AArch64/ProcessorBind.h | 53 +++++++++- MdePkg/Include/Base.h | 7 +- MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.asm | 39 ++++++++ MdePkg/Library/BaseLib/AArch64/DisableInterrupts.asm | 37 +++++++ MdePkg/Library/BaseLib/AArch64/EnableInterrupts.asm | 37 +++++++ MdePkg/Library/BaseLib/AArch64/GetInterruptsState.asm | 49 ++++++++++ MdePkg/Library/BaseLib/AArch64/MemoryFence.asm | 38 ++++++++ MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.asm | 101 ++++++++++++++++++++ MdePkg/Library/BaseLib/AArch64/SwitchStack.asm | 69 +++++++++++++ MdePkg/Library/BaseLib/BaseLib.inf | 8 ++ 12 files changed, 463 insertions(+), 9 deletions(-) create mode 100644 MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.asm create mode 100644 MdePkg/Library/BaseLib/AArch64/DisableInterrupts.asm create mode 100644 MdePkg/Library/BaseLib/AArch64/EnableInterrupts.asm create mode 100644 MdePkg/Library/BaseLib/AArch64/GetInterruptsState.asm create mode 100644 MdePkg/Library/BaseLib/AArch64/MemoryFence.asm create mode 100644 MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.asm create mode 100644 MdePkg/Library/BaseLib/AArch64/SwitchStack.asm -- 2.9.3.windows.2