From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::242; helo=mail-wm0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x242.google.com (mail-wm0-x242.google.com [IPv6:2a00:1450:400c:c09::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5D39C220F33DE for ; Thu, 15 Feb 2018 09:15:17 -0800 (PST) Received: by mail-wm0-x242.google.com with SMTP id v71so2233053wmv.2 for ; Thu, 15 Feb 2018 09:21:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nCmKX7R3Xdev4YDatrRU+tbfhCl/A+i6fDJ5rTqKs34=; b=JcW74saZcS2bIItmmDqNLS+IRPrDSkgQ4QENPrea5AmzYTiq3wzkBRlVCWX0D/fXDn lZhfl3qtxkLlGhoJbeq9Am4POCqdKWiHpCDXsVOjRBZaMQoVIejQBmPWPNIW0LyPABVK 8BxaDnDkdB95qjfHTA22cdB2BuWxZVcDga9Lg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nCmKX7R3Xdev4YDatrRU+tbfhCl/A+i6fDJ5rTqKs34=; b=D6ijt9lzRxV2qsjH8hpQ94x38FZ5bhgnuNs+c1ICRamFixag7JAevX+0PlLteOqAgA Ji3ACEr/odfmLS7VVD6L5MwamOZ2ThELdz50LqI6GlODEkFVm0BUtFVm9+5oODojNeti Rx6y6QLv2uR//jFji7Ld484BM3hFS21ZgKMGwZEhOAYaTdq7yvB1bfKDAVnvg15d8jIG Agf8v6ZKJrHPH6TB2e6Wzq5dwA4Hv8FIYu8ZasSw1Del1H0zXMr+TDdtozVk0rSt4n3J IhX0F84d+S6WApBSTGTtzoLQ27DB+dArIJgaoXmnU9AStSO6HDis54ZL+eLBn8nFIOgW R7OQ== X-Gm-Message-State: APf1xPAJc2X4k4uYwNc4BcXXRtoDi73/lhfIK6vEUMBBNW+t06dHBPOu kCTMJ9HG/g1y2RICG89QZKdsvletpJo= X-Google-Smtp-Source: AH8x2245XMA5fa90sPdM4aVyxzN0HZbbFcYrA/LFX78qGskVlfObZ5Gi9tWfCOVIeai2QbiL7TG83A== X-Received: by 10.28.45.151 with SMTP id t145mr2674175wmt.129.1518715268078; Thu, 15 Feb 2018 09:21:08 -0800 (PST) Received: from localhost.localdomain ([154.145.114.50]) by smtp.gmail.com with ESMTPSA id j125sm14142363wmd.19.2018.02.15.09.21.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Feb 2018 09:21:07 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, joakim.bech@linaro.org, Ard Biesheuvel Date: Thu, 15 Feb 2018 17:20:50 +0000 Message-Id: <20180215172054.27452-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180215172054.27452-1-ard.biesheuvel@linaro.org> References: <20180215172054.27452-1-ard.biesheuvel@linaro.org> Subject: [PATCH edk2-platforms 1/5] Silicon/SynQuaver/DeviceTree: add node for SPI controller X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Feb 2018 17:15:18 -0000 Add a node for the SPI controller to the device tree so the OS may attach to it. This is the SPI controller that is attached to the 96boards mezzanine connector on Developer Box. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 9085adb326ab..ba445a50f16f 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -538,4 +538,22 @@ clock-names = "core", "iface"; dma-coherent; }; + + clk_alw_1_8: spi_ihclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + clock-output-names = "iHCLK"; + }; + + spi: spi@54810000 { + compatible = "socionext,synquacer-spi"; + reg = <0x0 0x54810000 0x0 0x1000>; + clocks = <&clk_alw_1_8>; + clock-names = "iHCLK"; + socionext,use-rtm; + socionext,set-aces; + #address-cells = <1>; + #size-cells = <0>; + }; }; -- 2.11.0