From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::243; helo=mail-wr0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x243.google.com (mail-wr0-x243.google.com [IPv6:2a00:1450:400c:c0c::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 10FD721F0DA4A for ; Thu, 15 Feb 2018 09:15:23 -0800 (PST) Received: by mail-wr0-x243.google.com with SMTP id 34so396799wre.13 for ; Thu, 15 Feb 2018 09:21:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WHduvIc6AEyj4lo6cO16bInCBVHMJLowoIlEf2LBEFo=; b=GgC8qt7nnaO6ncfZW8OcsGadMTz+HWJ7H2zH0I5/MlZHKGMsJ+qVVODCKgnu/C3GDJ Ry0ZtqNMOqQVYVKuUO2IPza6BV9KlfoSZiy0Kryh5a/WY0qSp6SHHNjLhFj4uJuD5U/B /UPtRE0NInDXjTQ/NSKN99yVf/BmgNvnq/NTQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WHduvIc6AEyj4lo6cO16bInCBVHMJLowoIlEf2LBEFo=; b=W9hEBbvwRTYQG3nGp6yMWq0QbwiOJNuIeNFoHZNr/iVW1sO3aX5qDwDsVdOOl1JISr dYVSbfgM1WForSolr/na1otaax1Bx2uN07mOe3f3xVrZHoeBDIvu/9U1Q5x6LJHcSU9a gSMiR+Yt7uR+6qU8cFHp1tNGfWaKkjYGE5uyfRwbpBEqFNgMqwr4ztczJSWGdZovR66f RDG4Fyhx/nwivDtm0lV10DLcBdc/dtcxUYLSWqcx+kZViqev1FrcjH8W9bEPlowjpq3K gt+CiglJGPQiZ6F2VyqpDZ1+JU8+BcSb22czPt157bqLvQHlUFU78Tiq+sLMaB/ZPgqo 3FMA== X-Gm-Message-State: APf1xPBPxKvHk05/jCD+0gIyPgRi0HDFXbRpO8mswLo34lt5COhdd6H4 m+c7xE/5r0i3RkEt7QwZVje4uTXP2MU= X-Google-Smtp-Source: AH8x224flOI3KPl1SiPQhnzC0Ofw6TIMTlZFTxmw8aJksYjOdRsyCE9ygR4cWIljOgOK7+CLPHmDpA== X-Received: by 10.223.144.163 with SMTP id i32mr3366753wri.73.1518715275188; Thu, 15 Feb 2018 09:21:15 -0800 (PST) Received: from localhost.localdomain ([154.145.114.50]) by smtp.gmail.com with ESMTPSA id j125sm14142363wmd.19.2018.02.15.09.21.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Feb 2018 09:21:14 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, joakim.bech@linaro.org, Ard Biesheuvel Date: Thu, 15 Feb 2018 17:20:54 +0000 Message-Id: <20180215172054.27452-6-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180215172054.27452-1-ard.biesheuvel@linaro.org> References: <20180215172054.27452-1-ard.biesheuvel@linaro.org> Subject: [PATCH edk2-platforms 5/5] Platform/Socionext/DeveloperBox: add Secure96 support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Feb 2018 17:15:24 -0000 Add the drivers and set the PCD values according to our integration of the LS connector on Developer Box so that, when selected in the menu, the device tree presented in the OS is augmented with nodes describing the various peripherals that are present on the Secure96 mezzanine board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 21 ++++++++++++++++++++ Platform/Socionext/DeveloperBox/DeveloperBox.fdf | 6 ++++++ 2 files changed, 27 insertions(+) diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc index 1e39c29d7910..39bee17dccc1 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc @@ -33,6 +33,9 @@ [Defines] [BuildOptions] RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=0 + # add ample padding to the DTC so we can apply 96boards mezzanine overlays + *_*_*_DTC_FLAGS = -p 1024 + [BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION] GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 @@ -396,6 +399,18 @@ [PcdsFixedAtBuild.common] !endif gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision|$(BUILD_NUMBER) + # + # 96boards Secure96 mezzanine support + # + gSecure96TokenSpaceGuid.PcdGpioLedPolarity|0 + gSecure96TokenSpaceGuid.PcdGpioLedU1|20 + gSecure96TokenSpaceGuid.PcdGpioLedU2|19 + gSecure96TokenSpaceGuid.PcdGpioLedU3|22 + gSecure96TokenSpaceGuid.PcdGpioLedU4|21 + gSecure96TokenSpaceGuid.PcdGpioParent|"/gpio@51000000" + gSecure96TokenSpaceGuid.PcdI2cParent|"/i2c@51210000" + gSecure96TokenSpaceGuid.PcdSpiParent|"/spi@54810000" + [PcdsPatchableInModule] gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0 gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0 @@ -642,6 +657,12 @@ [Components.common] SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf # + # 96board mezzanine support + # + Platform/96boards/Secure96/DeviceTree/DeviceTree.inf + Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.inf + + # # I2C # Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf index c2bc5aa85739..35e2e64c8c93 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf @@ -237,6 +237,12 @@ [FV.FvMain] } # + # 96board mezzanine support + # + INF RuleOverride = DTB Platform/96boards/Secure96/DeviceTree/DeviceTree.inf + INF Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.inf + + # # I2C # INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf -- 2.11.0