From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::244; helo=mail-wm0-x244.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 95659223230D2 for ; Fri, 16 Feb 2018 08:54:31 -0800 (PST) Received: by mail-wm0-x244.google.com with SMTP id h74so4322864wme.5 for ; Fri, 16 Feb 2018 09:00:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=9siyJmT2seTXSGBuxyqggxH9Seq3nrBh1ZmjuZ+QaWA=; b=ULbtZVQ6ktkK5RH5y+iSYjPaLxD+SywjvhmxQXArzro+qhYKEPx+pPgTWk4iWc0yRq uGzoCROisM5CCPlxn8iESdIhIR+JEmphxqd/ifMtStXJ626iEZaFw1obw0rskzQzRG/e EL5Z9vR0VC/y7A/CPJDTm4Mwxq1+oOoqlVd6E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=9siyJmT2seTXSGBuxyqggxH9Seq3nrBh1ZmjuZ+QaWA=; b=W6fcDvCBa6cpCsw800LRTLEZcbYEbWrIoP6E3m8PNAgN7PysMSH2ENkR9myPJf0KEI yUx5mXkn3FH6A6LzMdj/PmWn2NAfkUPVa0BLEnDFnnEU+8QlpFGVkekS0BL29X1WsiLy z7K/8zUZxxa7jH3QJBgz9mt3l1aQR9fgdaot/W5tWTgifnh4jmrzcsbCMxldeX+tTSfs Z07lfGcAnB87mFJ0XyGhx41OzrVU5r+/llP+IR6ZeonXLwVzc/2+CjAt6TD7v1u9p40J LP5aew8d78BP8fuF8H5Gv2ACvxVSEnF+zDW2B0D8hoSb5aCrhUVwNB+1chh542rfPyqM JzZQ== X-Gm-Message-State: APf1xPDkd3jYfKr/6To1hn1bR0CNZCNk6FDFliL9vfEDp7RVgw6binw6 cZYc3j+IKSuOawHJVcScN9So6g== X-Google-Smtp-Source: AH8x227KY2PogILYdazSeWwdBCsIGQLqQYURcQQJ2uqn3S225dkiXOy0v1w8K5Xf03ZczqGvmUn5Gg== X-Received: by 10.28.106.2 with SMTP id f2mr5874066wmc.84.1518800423702; Fri, 16 Feb 2018 09:00:23 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id b54sm26424138wrg.27.2018.02.16.09.00.22 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Feb 2018 09:00:22 -0800 (PST) Date: Fri, 16 Feb 2018 17:00:20 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, joakim.bech@linaro.org Message-ID: <20180216170020.inkadbvnr25zczhh@bivouac.eciton.net> References: <20180215172054.27452-1-ard.biesheuvel@linaro.org> <20180215172054.27452-2-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20180215172054.27452-2-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms 1/5] Silicon/SynQuaver/DeviceTree: add node for SPI controller X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 16:54:32 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Feb 15, 2018 at 05:20:50PM +0000, Ard Biesheuvel wrote: > Add a node for the SPI controller to the device tree so the OS may > attach to it. This is the SPI controller that is attached to the > 96boards mezzanine connector on Developer Box. Just a generic question (which also applies to the subsequent patch): Are there any implications here with regards to this bus running in master or slave mode? / Leif > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > --- > Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi > index 9085adb326ab..ba445a50f16f 100644 > --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi > +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi > @@ -538,4 +538,22 @@ > clock-names = "core", "iface"; > dma-coherent; > }; > + > + clk_alw_1_8: spi_ihclk { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <125000000>; > + clock-output-names = "iHCLK"; > + }; > + > + spi: spi@54810000 { > + compatible = "socionext,synquacer-spi"; > + reg = <0x0 0x54810000 0x0 0x1000>; > + clocks = <&clk_alw_1_8>; > + clock-names = "iHCLK"; > + socionext,use-rtm; > + socionext,set-aces; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > }; > -- > 2.11.0 >