From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::244; helo=mail-wm0-x244.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EE203223230DF for ; Fri, 16 Feb 2018 09:30:04 -0800 (PST) Received: by mail-wm0-x244.google.com with SMTP id 141so4435498wme.3 for ; Fri, 16 Feb 2018 09:35:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=Axf8+qoAEoJneEaKEsD9wMEO1V0nxPAD6dOXjNLnMIU=; b=UzI7BFYThRea+hmomS5BTjYkDm/rMkcg3PzkdYDRRXUGP9f9PeoP/7E8M2n6Ref2Vx HQ+K5Sq6CwAlzelioM2Lo6IHifD4sk1UQ0G5Fz2cP8tOcWpkT5ldViBmpmpPu3qnamSu IOM/gFlur3yeB9slQL8FWkmQhfvt1BFARnPyc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=Axf8+qoAEoJneEaKEsD9wMEO1V0nxPAD6dOXjNLnMIU=; b=DJFVBteD6W7DfM3he5VB5yF2QBBU1RSJHUI9t2BxnLqJ3mSnVEdw6Ysqb26SKVLaUW DWPLOMURIexmQNsHoZpiBdlZuejVWopP8Ihku5Lq5tQaVAVH9OgT/KZbW2m2EuqQJ3Ui RsRbYzD+C0jmjLNwickwD0i+QSGNMmgzfGcIUuavz6JcGvn+f7KXIJl2Dn5Y28w78vof RTaBGySRORpR+jQ8YIT4AgVkM4xt7lu+Y45X0ohB6OmpvJd+sdUph7qh5hXtOw7BqQUQ 30VvGlZICu7pSMpz/JonbJ0ydfDnYqL9OXGcwtA12Vqlpl2afOljadrQ+wRSdX0lKVpV 4+og== X-Gm-Message-State: APf1xPCcoehWjQjWBIjvQgwmymbhNfGP0qqWH5ACeIafhPAO9f5Ai3W8 jpFUXUXSUSxhlALjPW9qVrEREw== X-Google-Smtp-Source: AH8x225s2giGexywqw57JDyFzQmSKxLFn/hYeHDBh3bEQrjis4RdImPDI8AITs6t9BH24TmHTSJpZA== X-Received: by 10.28.239.19 with SMTP id n19mr5412803wmh.20.1518802557540; Fri, 16 Feb 2018 09:35:57 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id 104sm16587803wrl.74.2018.02.16.09.35.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Feb 2018 09:35:56 -0800 (PST) Date: Fri, 16 Feb 2018 17:35:55 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, joakim.bech@linaro.org Message-ID: <20180216173555.s5wwntwmwc34ioxv@bivouac.eciton.net> References: <20180215172054.27452-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20180215172054.27452-1-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms 0/5] Add Secure96 mezzanine support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 17:30:05 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Feb 15, 2018 at 05:20:49PM +0000, Ard Biesheuvel wrote: > This series adds preliminary support for the Secure96 mezzanine board, > an expansion board that can be plugged into the low speed connector on > the Socionext SynQuacer based Developer Box platform. > > I have attempted to implement this in a reusable way, i.e., the secure96 > specific parts are in separate drivers which could theoretically be > imported by other platforms as well. > > I am presenting this to discuss the approach. My end goal is to wire up > the Atmel SHA204A on this board in UEFI so it can be used as a random > number generator, but this should be mostly orthogonal (and if it isn't, > we can add it on top). So, ideally I would like to see a lot more reusable code for handling overlays, but as this is the first mezzanine board to be added I'm actually pretty happy for it to go in[1]. We may want a whiteboard session at Linaro Connect to discuss the generic problem. / Leif [1] Apart from any potential modifications to 1-2/5. Oh, and there's a typo in SynQuacer in the subject of 1-2/5. > Ard Biesheuvel (5): > Silicon/SynQuaver/DeviceTree: add node for SPI controller > Silicon/SynQuaver/DeviceTree: add node for I2C controller > Platform: add support for 96boards Secure96 mezzanine adapter > Silicon/SynQuacer/PlatformDxe: add menu option to select mezzanine > Platform/Socionext/DeveloperBox: add Secure96 support > > Platform/96boards/Secure96/DeviceTree/DeviceTree.inf | 40 +++++ > Platform/96boards/Secure96/DeviceTree/Secure96.dts | 74 ++++++++++ > Platform/96boards/Secure96/Secure96.dec | 56 +++++++ > Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.c | 153 ++++++++++++++++++++ > Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.inf | 51 +++++++ > Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 21 +++ > Platform/Socionext/DeveloperBox/DeveloperBox.fdf | 6 + > Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 36 +++++ > Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | 8 + > Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 + > Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni | 6 + > Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr | 8 + > Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h | 6 +- > 13 files changed, 466 insertions(+), 1 deletion(-) > create mode 100644 Platform/96boards/Secure96/DeviceTree/DeviceTree.inf > create mode 100644 Platform/96boards/Secure96/DeviceTree/Secure96.dts > create mode 100644 Platform/96boards/Secure96/Secure96.dec > create mode 100644 Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.c > create mode 100644 Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.inf > > -- > 2.11.0 >