From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::243; helo=mail-wm0-x243.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2FE5420955F21 for ; Tue, 27 Feb 2018 09:30:38 -0800 (PST) Received: by mail-wm0-x243.google.com with SMTP id h21so144713wmd.1 for ; Tue, 27 Feb 2018 09:36:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=kF+djsSHACXWJmf7u4N0wY0g6K0/fSx9Q8YWkuS4bVc=; b=dyUukbQY9AI5Al4AOeIzKSnthtndZxBfhNSU/EnHYbEySIy1GZ4YKOboQuypvHJdUG Ay/WREz1v6POpr1ensJobFQOKyGOKcM1Me+5pIKUVEA1gvrlmWs1SCek4kt/PiN4fPJz Mv/EhDhTHAVP9bgg+JCqOd95U5ONv7aiaoH/U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=kF+djsSHACXWJmf7u4N0wY0g6K0/fSx9Q8YWkuS4bVc=; b=APL58lUWaAyqz5tUuqSsWYZ6xi/qnwi0EY5/HIBBzOsx5Bbu7KmfAclrRj9QNWTu8O ECJ6gSZmn4Ma6WQh0+CXzTZAjULW4DbUlpGHgPJZ/YyZEIcDpkbEUtLr7zudOEdLggXp f6C4eikP9hh7GAx7BElqrmALsyIAFlBz9KPXGGksRZlKdLfUxg9HrFzt9aQHrLDkqiUK PfXDGL7toz4uBHXbK0QbTLCFbj3LdMj7aGJH2pVUVLPGm4en3vB8N65v6z9Ek/rjcsHJ X2j5Pi/kqOnBG1FsQ6vneZgkE7fyLa3PNadqdRV2ImZfFzq3XFmk11RT2R58i+grH2Lc +WpA== X-Gm-Message-State: APf1xPDVI3ivCvoPU2vf9ENaicWw5faUI82PpMJ0U9IyFQKgp2eAZuIv HDT9+48V5NUmU4XKDbnud7t6RQ== X-Google-Smtp-Source: AH8x224u21dm1JeKuYHBxpzyr9pYyB/KGtezLzVf0ScPwg8yv3CB3YkrdpOlt/KHOK9FKXNpdSJhng== X-Received: by 10.28.106.18 with SMTP id f18mr11940332wmc.51.1519753002996; Tue, 27 Feb 2018 09:36:42 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id 55sm13544403wrz.6.2018.02.27.09.36.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 27 Feb 2018 09:36:41 -0800 (PST) Date: Tue, 27 Feb 2018 17:36:40 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: "edk2-devel@lists.01.org" Message-ID: <20180227173640.vavijseacrm5wnau@bivouac.eciton.net> References: <20180227134747.13238-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms] Silicon/SynQuacer: add stage 2 override translation tables for PCIe X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Feb 2018 17:30:38 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Feb 27, 2018 at 05:19:59PM +0000, Ard Biesheuvel wrote: > On 27 February 2018 at 13:47, Ard Biesheuvel wrote: > > The Designware PCIe IP in the SynQuacer SoC needs a little help to > > appear sane to the OS. Not only does it lack a true root port, and > > therefore does not perform any filtering whatsoever of type 0 config > > TLPs that are not intended for the link peer, it also has trouble > > issuing 64-bit wide MMIO accesses, which are often used on MMIO BARs > > with memory semantics (e.g., frame buffers). > > > > So let's create a stage 2 mapping covering the entire physical address > > space, and remap some ECAM regions and demote write combine attributes > > to device/strongly ordered. This is not a water tight fix, but it does > > work around the issues in the majority of cases. > > > > (Note that the ECAM remapping can also be addressed in the SMMU mapping > > of the PCIe IP exposed to the CPU, but this is currently under > > development, and it does not hurt to have it in two places) > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Ard Biesheuvel > > --- > > This is a followup to/replacement for '[RFC PATCH edk2-non-osi] > > Platform/DeveloperBox: add prebuilt binary containing stage 2 page tables' > > > > Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 1 + > > Platform/Socionext/DeveloperBox/DeveloperBox.fdf | 5 +- > > Silicon/Socionext/SynQuacer/Stage2Tables/GNUmakefile | 23 +++++ > > Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S | 88 ++++++++++++++++++++ > > Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf | 32 +++++++ > > 5 files changed, 148 insertions(+), 1 deletion(-) > > > ... > > diff --git a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf > > new file mode 100644 > > index 000000000000..9bec659af444 > > --- /dev/null > > +++ b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf > > @@ -0,0 +1,32 @@ > > +## @file > > +# > > +# Copyright (c) 2018, Linaro, Ltd. All rights reserved.
> > +# > > +# This program and the accompanying materials > > +# are licensed and made available under the terms and conditions of the BSD License > > +# which accompanies this distribution. The full text of the license may be found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > > +# > > +## > > + > > +[Defines] > > + INF_VERSION = 0x0001001A > > + BASE_NAME = Stage2Tables > > + FILE_GUID = e11cbca5-8f82-41a7-8441-02b48acc13a7 > > + MODULE_TYPE = USER_DEFINED > > + VERSION_STRING = 1.0 > > + CUSTOM_MAKEFILE = GCC|GNUmakefile > > + > > +[Sources] > > + Stage2Tables.S > > + > > +[Packages] > > + MdePkg/MdePkg.dec > > + Silicon/Socionext/SynQuacer/SynQuacer.dec > > + > > +[BuildOptions] > > + *_*_*_OBJCOPY_PATH == objcopy > > + *_*_*_OBJCOPY_FLAGS == -I elf64-little -O binary -j .rodata > > I can improve this and fix Clang at the same time by adding > > *_*_*_ASM_FLAGS == -nostdlib > -Wl,-e,0x81f8000,--section-start=.rodata=0x81f8000 > *_CLANG35_*_ASM_FLAGS = -no-integrated-as > *_CLANG38_*_ASM_FLAGS = -no-integrated-as > > (and remove the linker arguments from the Makefile) I can confirm this resolves the CLANG issue. Could we do this with a CLANG_ALL_ASM_FLAGS, rather than listing each new toolchain profile as they get added? / Leif